JAJSD34D April   2017  – June 2024 CSD88599Q5DC

PRODUCTION DATA  

  1.   1
  2. 1特長
  3. 2アプリケーション
  4. 3概要
  5. 4Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 Recommended Operating Conditions
    3. 4.3 Power Block Performance
    4. 4.4 Thermal Information
    5. 4.5 Electrical Characteristics
    6. 4.6 Typical Power Block Device Characteristics
    7. 4.7 Typical Power Block MOSFET Characteristics
  6. 5Application and Implementation
    1. 5.1 Application Information
    2. 5.2 Brushless DC Motor With Trapezoidal Control
    3. 5.3 Power Loss Curves
    4. 5.4 Safe Operating Area (SOA) Curve
    5. 5.5 Normalized Power Loss Curves
    6. 5.6 Design Example – Regulate Current to Maintain Safe Operation
    7. 5.7 Design Example – Regulate Board and Case Temperature to Maintain Safe Operation
    8. 5.8 Layout
      1. 5.8.1 Layout Guidelines
        1. 5.8.1.1 Electrical Performance
        2. 5.8.1.2 Thermal Considerations
      2. 5.8.2 Layout Example
  7. 6Device and Documentation Support
    1. 6.1 ドキュメントの更新通知を受け取る方法
    2. 6.2 サポート・リソース
    3. 6.3 Trademarks
    4. 6.4 静電気放電に関する注意事項
    5. 6.5 用語集
  8. 7Revision History
  9. 8Mechanical, Packaging, and Orderable Information

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発注情報

8 Mechanical, Packaging, and Orderable Information

The following pages include mechanical packaging and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

Table 8-1 Pin Configuration Table
POSITION PIN NAME DESCRIPTION
1 GH High Side Gate
2 SH High Side Gate Return
3-11 VSW Switch Node
12-20 PGND Power Ground
21 NC No Connect
22 GL Low Side Gate
23-26 NC No Connect
27 VIN Input Voltage