6 Specifications
6.1 Absolute Maximum Ratings
TA = 25°C (unless otherwise stated)(1)
|
MIN |
MAX |
UNIT |
|
VIN to PGND |
–0.3 |
20 |
V |
|
VIN to VSW |
–0.3 |
20 |
V |
|
VIN to VSW (10 ns) |
|
23 |
V |
|
VSW to PGND |
–0.3 |
20 |
V |
|
VSW to PGND (10 ns) |
–7 |
23 |
V |
|
VDD to PGND |
–0.3 |
7 |
V |
|
PVDD to PGND |
–0.3 |
7 |
V |
|
EN/FCCM, TAO/FLT, LSET to PGND |
–0.3 |
VDD + 0.3 |
V |
|
IOUT, VOS, PWM to PGND |
–0.3 |
7 |
V |
|
REFIN |
–0.3 |
3.6 |
V |
|
BOOT to BOOTR(2) |
–0.3 |
VDD + 0.3 |
V |
|
BOOT to PGND |
–0.3 |
30 |
V |
TJ |
Operating junction temperature |
–55 |
150 |
°C |
Tstg |
Storage temperature |
–55 |
150 |
°C |
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Should not exceed 7 V.
6.2 ESD Ratings
|
|
VALUE |
UNIT |
V(ESD) |
Electrostatic discharge |
Human-body model (HBM) |
±2000 |
V |
Charged-device model (CDM) |
±500 |
6.3 Recommended Operating Conditions
TA = 25°C (unless otherwise stated)
|
MIN |
MAX |
UNIT |
VDD |
Driver supply voltage |
|
4.5 |
5.5 |
V |
PVDD |
Gate drive voltage |
|
4.5 |
5.5 |
V |
VIN |
Input supply voltage(1) |
|
4.5 |
16 |
V |
VOUT |
Output voltage |
|
|
5.5 |
V |
|
PWM to PGND |
|
|
VDD + 0.3 |
V |
IOUT |
Continuous output current |
VIN = 12 V, VDD = 5 V, PVDD = 5 V, VOUT = 1.2 V, ƒSW = 500 kHz(2) |
|
70 |
A |
IOUT-PK |
Peak output current(3) |
|
90 |
A |
ƒSW |
Switching frequency |
CBST = 0.1 µF (min), VOUT = 2.5 V (max) |
|
1250 |
kHz |
|
On-time duty cycle |
ƒSW = 1 MHz |
|
85% |
|
|
Minimum PWM on-time |
|
20 |
|
ns |
|
Operating junction temperature |
|
–40 |
125 |
°C |
(1) Operating at high VIN can create excessive AC voltage overshoots on the switch node (VSW) during MOSFET switching transients. For reliable operation, the switch node (VSW) to ground voltage must remain at or below the Absolute Maximum Ratings.
(2) Measurement made with six 10-µF (TDK C3216X7R1C106KT or equivalent) ceramic capacitors across VIN to PGND pins.
(3) System conditions as defined in Note 2. Peak output current is applied for tp = 50 µs.
6.4 Thermal Information
TA = 25°C (unless otherwise stated)
THERMAL METRIC |
MIN |
TYP |
MAX |
UNIT |
θJC |
Thermal resistance, junction-to-case (top of package) |
|
7.4 |
|
°C/W |
θJB |
Thermal resistance, junction-to-board(1) |
|
2.2 |
|
°C/W |
ΨJT |
Junction-to-top characterization parameter |
|
0.9 |
|
°C/W |
(1) θJB is determined with the device mounted on a 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu pad on a 1.5-in × 1.5-in, 0.06-in (1.52-mm) thick FR4 board based on hottest board temperature within 1 mm of the package.