JAJSSV2G March 2011 – January 2024 DAC3482
PRODUCTION DATA
Figure 6-31 shows an equivalent circuit for the DAC input clock (DACCLKP/N) and the output strobe clock (OSTRP/N).
Figure 6-32 shows the preferred configuration for driving the CLKIN/CLKINC input clock with a differential ECL/PECL source.