JAJSRY8A November 2023 – March 2024 DAC39RF12 , DAC39RFS12
PRODUCTION DATA
The best SWAP-C sub-system leverages the high levels of integration offered by modern PLL+VCO devices, such as the LMX2820. Figure 8-7 shows a block diagram of the clocking sub-system. An external reference clock feeds the LMX2820 input, which is then used to lock the internal PLL+VCO before being fed to the output buffers. Only external passives are required to construct the loop filter and complete the sub-system system.
The LMX2820 is a flexible device and configuration can be overwhelming, for example deciding how to decipher configure dividers, set loop filter components, etc. A few high-level guidelines can be taken into consideration to optimize phase noise.
First,always operate the LMX2820 in integer mode when possible (as opposed to fractional mode). This implies that relationship between reference clock and output clock follows the general form:
where NREF, NDIV and NOUT are the reference, feedback and output dividers respectively. FREF is the input reference frequency and FOUT is the output frequency used as the DAC clock. If this ratio cannot be found, then fractional mode must be used at the expense of degraded overall phase noise.
Second, the best in-band phase noise is achieved when the phase detector frequency is maximized and the feedback divider is minimized. The LMX2820 has a maximum phase detector frequency of 400 MHz and an optional reference doubler is available for reference inputs up to 200 MHz. For the same output frequency, each doubling of phase detector frequency (while halving the feedback divider) results in 3 dB of in band phase noise reduction.
For an 8 GHz output, use the maximum phase detector frequency of 400 MHz. Set NREF = 1, NDIV = 20, and NOUT = 1 (divider bypass). For a slight degradation in in-band noise, the input can be set to 200 MHz and the reference doubler is used.
Third, note that any noise on the reference input impacts close in phase noise before the in-band noise begins to dominate. In-band noise is a combination of PLL noise (phase detector, charge pump and dividers) and VCO noise, while wideband noise is limited by the noise floor of the output buffers. Close in noise is limited by the device flicker, which is independent of phase detector frequency and scales 20 x LOGbase10 with output frequency.
Finally, when operating the LMX2820 above 11 GHz, the integrated output doubler must be used and this results in a sub-harmonic (that is, output frequency divided by 2) that possibly requires external filtering using either a high-pass or bandpass filter (depending on system requirements). Following the LMX2820 output with a narrow bandpass filter can also be used to suppress wideband noise.
The PLLatinumSim software is available from TI to design the external loop filter passive values.