JAJSLP1 September 2023 DAC43901-Q1 , DAC43902-Q1
PRODUCTION DATA
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
X | VOUT-GAIN-x | X | CMP-x-OD-EN | CMP-x-OUT-EN | CMP-x-HIZ-IN-DIS | CMP-x-INV-EN | CMP-x-EN | ||||||||
X-0h | R/W-0h | X-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
15-13 | X | X | 0h | Don't care |
12-10 | VOUT-GAIN-x | R/W | 0h | 000: Gain = 1 ×, external
reference on VREF/MODE pin 001: Gain = 1 ×, VDD as reference 010: Gain = 1.5 ×, internal reference 011: Gain = 2 ×, internal reference 100: Gain = 3 ×, internal reference 101: Gain = 4 ×, internal reference Others: Invalid |
9-5 | X | X | 0h | Don't care |
4 | CMP-x-OD-EN | R/W | 0 | 0: Set comparator out pin as
push-pull 1: Set comparator out pin as open-drain in comparator mode (CMP-x-EN = 1 and CMP-x-OUT-EN = 1) |
3 | CMP-x-OUT-EN | R/W | 0 | 0: Generate comparator output
but consume internally 1: Bring comparator output to the respective pin |
2 | CMP-x-HIZ-IN-DIS | R/W | 0 | 0: TRIG-IN input has
high-impedance. Input voltage range is limited. 1: TRIG-IN input is connected to resistor divider and has finite impedance. Input voltage range is same as full-scale. |
1 | CMP-x-INV-EN | R/W | 0 | 0: Don't invert the
comparator output 1: Invert the comparator output |
0 | CMP-x-EN | R/W | 0 | 0: Disable comparator mode 1: Enable comparator mode. Current-output must be in power-down. Voltage-output mode must be enabled. |