JAJSI90 データシート

JAJSI90A November 2019 – April 2020 DAC60502 , DAC70502 , DAC80502

PRODUCTION DATA.

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

DRX|10
- MPSS105A

サーマルパッド・メカニカル・データ

発注情報

8.10 Typical Characteristics

at T_A = 25°C, VDD = 5.5 V, internal reference = 2.5 V, REF-DIV = 0 and BUFF-GAIN = 1, channel A shown, and DAC outputs unloaded (unless otherwise noted)

Figure 3. Integral Linearity Error vs Digital Input Code

Figure 5. Total Unadjusted Error vs Digital Input Code

Figure 7. Differential Linearity Error vs Temperature

Figure 9. Zero-Code Error vs Temperature

Figure 11. Full-Scale Error vs Temperature

REF-DIV = 0 and BUFF-GAIN = 0

Figure 13. Integral Linearity Error vs Supply Voltage

Figure 15. Total Unadjusted Error vs Supply Voltage

Figure 17. Offset Error vs Supply Voltage

Figure 19. Full-Scale Error vs Supply Voltage

Figure 21. Differential Linearity Error vs Reference Voltage

Figure 23. Zero-Code Error vs Reference Voltage

Figure 25. Gain Error vs Reference Voltage

Figure 27. Supply Current vs Digital Input Code

DAC code at midscale

Figure 29. Supply Current vs Supply Voltage

External reference = 2.5 V, REF-DIV = 1 and BUFF-GAIN = 0

Figure 31. Power Down Current vs Supply Voltage

REF-DIV = 0 and BUFF-GAIN = 0

Figure 33. Source and Sink Capability

REF-DIV = 1 and BUFF-GAIN = 0

Figure 35. Source and Sink Capability

DAC code transition from midscale to midscale – 1 LSB,
REF-DIV = 0 and BUFF-GAIN = 0

Figure 37. Glitch Impulse, Falling Edge, 1-LSB Step

REF-DIV = 0 and BUFF-GAIN = 0

Figure 39. Full-Scale Settling Time, Falling Edge

REF-DIV = 0 and BUFF-GAIN = 0

Figure 41. Power-Off Glitch

f_o = 1 kHz, f_s = 400 kHz, includes 7 harmonics,
measurement bandwidth = 20 kHz, external reference = 2.5 V,
REF-DIV = 0 and BUFF-GAIN = 0

Figure 43. DAC Output THD+N vs Frequency

DAC code at midscale, external reference = 2.5 V,
REF-DIV = 0 and BUFF-GAIN = 0

Figure 45. DAC Output Noise: 0.1 Hz to 10 Hz

SCLK = 1 MHz, DAC code at midscale, external reference = 2.5 V,
REF-DIV = 0 and BUFF-GAIN = 0

Figure 47. Clock Feedthrough

Figure 49. Internal Reference Voltage vs Supply Voltage

Figure 51. Internal Reference Noise Density vs Frequency

Figure 53. Internal Reference Temperature Drift Histogram

Figure 55. Internal Reference Temperature Drift (Pre-Solder and Post-Solder) Histogram

Figure 4. Differential Linearity Error vs Digital Input Code

Figure 6. Integral Linearity Error vs Temperature

Figure 8. Total Unadjusted Error vs Temperature

Figure 10. Offset Error vs Temperature

Figure 12. Gain Error vs Temperature

REF-DIV = 0 and BUFF-GAIN = 0

Figure 14. Differential Linearity Error vs Supply Voltage

Figure 16. Zero-Code Error vs Supply Voltage

Figure 18. Gain Error vs Supply Voltage

Figure 20. Integral Linearity Error vs Reference Voltage

Figure 22. Total Unadjusted Error vs Reference Voltage

Figure 24. Offset Error vs Reference Voltage

Figure 26. Full-Scale Error vs Reference Voltage

DAC code at midscale

Figure 28. Supply Current vs Temperature

REF-DIV = 0 and BUFF-GAIN = 0

Figure 30. Power-Down Current vs Temperature

External reference = 2.5 V

Figure 32. Headroom and Footroom vs Load Current

REF-DIV = 0 and BUFF-GAIN = 1

Figure 34. Source and Sink Capability

DAC code transition from midscale – 1 to midscale LSB,
REF-DIV = 0 and BUFF-GAIN = 0

Figure 36. Glitch Impulse, Rising Edge, 1-LSB Step

REF-DIV = 0 and BUFF-GAIN = 0

Figure 38. Full-Scale Settling Time, Rising Edge

REF-DIV = 0 and BUFF-GAIN = 0

Figure 40. Power-On Glitch

DAC code at midscale, VDD = 5.0 V + 0.2 V_PP,
REF-DIV = 0 and BUFF-GAIN = 0

Figure 42. DAC Output AC PSRR vs Frequency

Gain = 1X (REF-DIV = 1 and BUFF-GAIN = 1),
external reference = 2.5 V,
REF-DIV = 0 and BUFF-GAIN = 0

Figure 44. DAC Output Noise Spectral Density

DAC code at midscale, internal reference = 2.5 V,
REF-DIV = 0 and BUFF-GAIN = 0

Figure 46. DAC Output Noise: 0.1 Hz to 10 Hz

30 units

Figure 48. Internal Reference Voltage vs Temperature

Figure 50. Internal Reference Voltage vs Time

Figure 52. Internal Reference Noise: 0.1 Hz to 10 Hz

Figure 54. Internal Reference Initial Accuracy
(Pre- and Post-Solder) Histogram