JAJSI90A November 2019 – April 2020 DAC60502 , DAC70502 , DAC80502
PRODUCTION DATA.
The DAx0502 family of devices includes a 2.5-V precision band-gap reference enabled by default. Operation from an external reference is supported by disabling the internal reference in the REF_PWDWN bit (address 3h). The internal reference is externally available at the VREFIO pin and sources up to 5 mA. For noise filtering, use a minimum 150-nF capacitor between the reference output and AGND.
The reference voltage to the device, either from the internal reference or an external one, can be divided by a factor of two by setting the REF-DIV bit (address 4h) to 1. The REF-DIV bit provides additional flexibility in setting the full-scale output range of the DAC output. Make sure to configure REF-DIV so that there is sufficient headroom from VDD to the DAC operating reference voltage, VREFIO (see Equation 1). See the Recommended Operating Conditions for more information.
Improper configuration of the reference divider triggers a reference alarm condition. In this case, the reference buffer is shut down, and all the DAC outputs go to 0 V. The DAC data registers are unaffected by the alarm condition, and thus enable the DAC output to return to normal operation after the reference divider is configured correctly.