Figure 9-1 provides the simplified circuit diagram for biasing a MZM for a Dither-type Bias Control circuit. As shown, this cicuit requires four differential input pairs for IQ biasing, and two differential input pairs for phase biasing. To bias a LiNbO₃ MZM, the voltage can be as high as ±18 V, whereas the current requirement is of the order of few micro amperes. The low cutoff frequency of the receiver is typically 100 kHz, and hence, the bandwidth of the dither signals should be well below this frequency. Be aware that only the IQ bias inputs require the dither signal, and not the phase bias. The DACx1416 featuresa toggle mode wherein the outputs can be configured to provide a square wave imposed on a dc bias. This mode requires setting the HIGH and LOW codes for the square wave and the transition happens in sync with the selected toggle input pin. The pseudocode to achieve the dither output using the toggle function is provided below.

//SYNTAX: WRITE <REGISTER NAME>,<DATA>
//Power-on Device, Disable Soft-toggle
WRITE SPICONFIG,0x0A84
//Select Range for all 12 channels as ±10V
WRITE DACRANGE2, 0xAAAA
WRITE DACRANGE3, 0xAAAA
WRITE DACRANGE4, 0xAAAA
//Power-on DAC Channels 0 - 11
WRITE DACPWDWN,0xF000
//Write HIGH code to Register A of all IQ Bias Differential Pairs
WRITE DAC0,0xXXXX
WRITE DAC2,0xXXXX
WRITE DAC4,0xXXXX
WRITE DAC6,0xXXXX
//Write Data to Phase Bias Channels
WRITE DAC8,0xXXXX
WRITE DAC10,0xXXXX
//Enable Sync for All Differential Pairs
WRITE SYNCCONFIG,0x0FFF
//Enable Software LDAC
WRITE TRIGGER,0x0002
//Write LOW code to Register B of all IQ Bias Differential Pairs
WRITE DAC_DATA0,0xXXXX
WRITE DAC_DATA0,0xXXXX
WRITE DAC_DATA0,0xXXXX
WRITE DAC_DATA0,0xXXXX
//Turn Toggle Mode ON for All IQ Differential Pairs
//DAC11-10:Y/Phase Bias , DAC9-8:Y/I Bias - TOGG0, DAC7-6:Y/Q Bias - TOGG 1
//DAC5-4:Y/Phase Bias , DAC3-2:Y/I Bias - TOGG0, DAC1-0:Y/Q Bias - TOGG 1
WRITE TOGGCONFIG0,0x0005
WRITE TOGGCONFIG1,0xA05A
//Method to Modify the DC Value of Any IQ Differential Pair
//Turn Off Toggle Mode for that Channel (e.g. DAC0-1)
WRITE TOGGCONFIG1,0xA050
//Turn Off Sync for the Channel
WRITE SYNCCONFIG,0x0FFC
//Write HIGH code to Register A of the Channel Pair
WRITE DAC0,0xXXXX
//Turn On Sync for the Channel Pair
WRITE SYNCCONFIG,0x0FFF
//Turn On Toggle for the Channel Pair
WRITE TOGGCONFIG1,0xA05A

The dither frequencies can be set at 1 kHz and 2 kHz so that a single-pole RC low-pass filter can provide sufficient attenuation at 100 kHz. For example, when R1 = R2 = 10 kΩ and C = 0.01 µF, an attenuation of approximately 40 dB is obtained at 100 kHz.