12 ビット DAC63004 および 10 ビット DAC53004 (DACx3004) は、超低消費電力、クワッド・チャネル、バッファ付き、電圧出力および電流出力のスマート D/A コンバータ (DAC) のピン互換ファミリです。DACx3004 は、ハイ・インピーダンスのパワーダウン・モードと、電源オフ状態中のハイ・インピーダンス出力をサポートしています。DAC 出力は、プログラマブルなコンパレータおよび電流シンクとして使用するためのフォース・センス・オプションを備えています。このスマート DAC は、多機能 GPIO、関数生成、NVM によって、プロセッサレス・アプリケーションや設計の再利用を実現できます。I2C、PMBus、SPI インターフェイスを自動的に検出します。また、内部リファレンスを搭載しています。
このスマート DAC は、小型パッケージおよび超低消費電力という特長を備えており、陸上移動無線、パルスオキシメータ (血中酸素飽和度計)、ノート PC 、その他バッテリ動作によるバイアス、キャリブレーション、波形生成などのアプリケーションに最適です。
部品番号 | パッケージ(1) | 本体サイズ (公称) |
---|---|---|
DACx3004 | WQFN (16) | 3.00mm × 3.00mm |
Changes from Revision * (April 2021) to Revision A (December 2021)
PIN | TYPE | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
1 | FB3 | Input | Voltage feedback pin for channel 3. In voltage-output mode, connect to OUT3 for closed-loop amplifier output. In current-output mode, keep the FB3 pin unconnected to minimize leakage current. |
2 | OUT3 | Output | Analog output voltage from DAC channel 3. |
3 | OUT2 | Output | Analog output voltage from DAC channel 2. |
4 | FB2 | Input | Voltage feedback pin for channel 2. In voltage-output mode, connect to OUT2 for closed-loop amplifier output. In current-output mode, keep the FB2 pin unconnected to minimize leakage current. |
5 | GPIO/SDO | Input/Output | General-purpose input/output configurable as LDAC, PD, PROTECT, RESET, SDO, and STATUS. For STATUS and SDO, connect the pin to the IO voltage with an external pullup resistor. If unused, connect the GPIO pin to VDD or AGND using an external resistor. This pin can ramp up before VDD. |
6 | SCL/SYNC | Output | I2C serial interface clock or SPI chip select input. This pin must be connected to the IO voltage using an external pullup resistor. This pin can ramp up before VDD. |
7 | A0/SDI | Input | Address
configuration pin for I2C or serial data input for SPI.
For A0, connect this pin to VDD, AGND, SDA, or SCL for address configuration (Section 7.5.2.2.1). For SDI, this pin need not be pulled up or pulled down. This pin can ramp up before VDD. |
8 | SDA/SCLK | Input/Output | Bidirectional I2C serial data bus or SPI clock input. This pin must be connected to the IO voltage using an external pullup resistor in the I2C mode. This pin can ramp up before VDD. |
9 | FB1 | Input | Voltage feedback pin for channel 1. In voltage-output mode, connect to OUT1 for closed-loop amplifier output. In current-output mode, keep the FB1 pin unconnected to minimize leakage current. |
10 | OUT1 | Output | Analog output voltage from DAC channel 1. |
11 | OUT0 | Output | Analog output voltage from DAC channel 0. |
12 | FB0 | Input | Voltage feedback pin for channel 0. In voltage-output mode, connect to OUT0 for closed-loop amplifier output. In current-output mode, keep the FB0 pin unconnected to minimize leakage current. |
13 | CAP | Power | External bypass capacitor for the internal LDO. Connect a capacitor (approximately 1.5 μF) between CAP and AGND. |
14 | AGND | Ground | Ground reference point for all circuitry on the device. |
15 | VDD | Power | Supply voltage. |
16 | VREF | Power | External
reference input. Connect a capacitor (approximately 0.1 μF) between
VREF and AGND. Use a pullup resistor to VDD when the external reference is not used. This pin must not ramp up before VDD. In case an external reference is used, make sure the reference ramps up after VDD. |
— | Thermal Pad | Ground | Connect the thermal pad to AGND. |