JAJSE83D April 2016 – December 2017 DAC60004 , DAC70004 , DAC80004
PRODUCTION DATA.
PIN | I/O | DESCRIPTION | ||
---|---|---|---|---|
NAME | NUMBER | |||
CLR | 9 | Digital Input | Clear DAC pin, falling edge sensitive | |
GND | 12 | Power | Ground | |
LDAC | 1 | Digital Input | Load DAC pin, active low | |
POR | 6 | Digital Input | Power-on-reset configuration, Connecting the POR pin to GND powers up all four DACs to zero scale. Connecting this pin to VDD powers up all four DACs to midscale. | |
REFIN | 7 | Analog Input | Voltage reference input for all channels | |
SCLK | 14 | Digital Input | Serial interface shift clock | |
SDIN | 13 | Digital Input | Serial interface digital input | |
SDO | 8 | Digital Output | Serial interface digital output for readback and daisy chaining | |
SYNC | 2 | Digital Input | Serial interface synchronization, active low | |
VDD | 3 | Power | Positive power supply (2.7 V to 5.5 V) | |
VOUTA | 4 | Analog Output | DAC A output | |
VOUTB | 11 | Analog Output | DAC B output | |
VOUTC | 5 | Analog Output | DAC C output | |
VOUTD | 10 | Analog Output | DAC D output |