JAJSEF1D
December 2013 – December 2021
DAC7750
,
DAC8750
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Electrical Characteristics: AC
7.7
Timing Requirements: Write Mode
7.8
Timing Requirements: Readback Mode
7.9
Timing Diagrams
7.10
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
DAC Architecture
8.3.2
Current Output Stage
8.3.3
Internal Reference
8.3.4
Digital Power Supply
8.3.5
DAC Clear
8.3.6
Power-On Reset
8.3.7
Alarm Detection
8.3.8
Watchdog Timer
8.3.9
Frame Error Checking
8.3.10
User Calibration
8.3.11
Programmable Slew Rate
8.4
Device Functional Modes
8.4.1
Setting Current-Output Ranges
8.4.2
Current-Setting Resistor
8.4.3
BOOST Configuration for IOUT
8.4.4
Filtering The Current Output
8.4.5
Output Current Monitoring
8.4.6
HART Interface
8.4.6.1
Implementing HART in 4-mA to 20-mA Mode
8.4.6.2
Implementing HART in All Current Output Modes
8.5
Programming
8.5.1
Serial Peripheral Interface (SPI)
8.5.1.1
SPI Shift Register
8.5.1.2
Write Operation
8.5.1.3
Read Operation
8.5.1.4
Stand-Alone Operation
8.5.1.5
Multiple Devices on the Bus
8.6
Register Maps
8.6.1
DACx750 Register Descriptions
8.6.1.1
Control Register
8.6.1.2
Configuration Register
8.6.1.3
DAC Registers
8.6.1.4
Reset Register
8.6.1.5
Status Register
9
Application and Implementation
9.1
Application Information
9.1.1
HART Implementation
9.1.1.1
Using the CAP2 Pin
9.1.1.2
Using the ISET-R Pin
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curve
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.1.1
Thermal Considerations
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Receiving Notification of Documentation Updates
12.3
サポート・リソース
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
PWP|24
MPDS372A
RHA|40
MPQF135D
サーマルパッド・メカニカル・データ
PWP|24
PPTD264C
RHA|40
QFND114P
発注情報
jajsef1d_oa
jajsef1d_pm
9.2
Typical Application
Figure 9-3
DACx750 in a Voltage and Current Output Driver for Factory Automation and Control, EMC and EMI Protected - DACx750 in an Analog Output (AO) Module