JAJSI70C May 2008 – November 2019 DAC9881
PRODUCTION DATA.
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
ACCURACY(1) | |||||||
Integral linearity error | Measured by line passing through codes 2048 and 262143 | DAC9881S | ±2.5 | ±3.5 | LSB | ||
DAC9881SB | ±2 | ±3 | LSB | ||||
Differential linearity error | Measured by line passing through codes 2048 and 262143 | DAC9881S | ±1 | ±2 | LSB | ||
DAC9881SB | ±0.75 | ±1.5 | LSB | ||||
Zero-scale error | TA = 25°C, code = 2048 | ±32 | LSB | ||||
TMIN to TMAX, code = 2048 | ±64 | LSB | |||||
Zero-scale drift(2) | Code = 2048 | ±0.5 | ±1.6 | ppm/°C of FSR | |||
Gain error | TA = 25°C, measured by line passing through codes 2048 and 262143 | ±32 | ±64 | LSB | |||
Gain temperature drift(2) | Measured by line passing through codes 2048 and 262143 | ±0.5 | ±0.8 | ppm/°C | |||
PSRR(2) | VOUT = full-scale, AVDD = 3 V ±10% | 64 | LSB/V | ||||
ANALOG OUTPUT(2) | |||||||
Voltage output(3) | 0 | AVDD | V | ||||
Output voltage drift vs time | Device operating for 500 hours at 25°C | 0.2 | ppm of FSR | ||||
Device operating for 1000 hours at 25°C | 0.4 | ppm of FSR | |||||
Output current(4) | 2.5 | mA | |||||
Maximum load capacitance | 200 | pF | |||||
Short-circuit current | 31/–50 | mA | |||||
REFERENCE INPUT(2) | |||||||
VREFH input voltage range | AVDD = 3 V | 1.25 | 2.5 | AVDD | V | ||
VREFH input capacitance | 5 | pF | |||||
VREFH input impedance | 4.5 | kΩ | |||||
VREFL input voltage range | –0.2 | 0 | 0.2 | V | |||
VREFL input capacitance | 4.5 | pF | |||||
VREFL input impedance | 5 | kΩ | |||||
DYNAMIC PERFORMANCE(2) | |||||||
Settling time | To ±0.003% FS, RL = 10 kΩ, CL = 50 pF, code 04000h to 3C000h | 5 | µs | ||||
Slew rate | From 10% to 90% of 0 V to 2.5 V | 2.5 | V/µs | ||||
Code change glitch | Code = 1FFFFh to 20000h to 1FFFFh | VREFH = 2.5 V, gain = 1X mode | 18 | nV-s | |||
VREFH = 1.25 V, gain = 1X mode | 9 | nV-s | |||||
VREFH = 1.25 V, gain = 2X mode | 10 | nV-s | |||||
Digital feedthrough | CS = high, fSCLK = 1 kHz | 1 | nV-s | ||||
Output noise voltage density | f = 1 kHz to 100 kHz,
full-scale output |
Gain = 1 | 24 | 30 | nV/√Hz | ||
Gain = 2 | 40 | 48 | nV/√Hz | ||||
Output noise voltage | f = 0.1 Hz to 10 Hz, full-scale output | 2 | µVPP | ||||
DIGITAL INPUTS(2) | |||||||
High-level input voltage, VIH | IOVDD = 2.7 V to 3.3 V | 2.1 | IOVDD + 0.3 | V | |||
IOVDD = 1.7 V to 2 V | 1.5 | IOVDD + 0.3 | V | ||||
Low-level input voltage, VIL | IOVDD = 2.7 V to 3.3 V | –0.3 | 0.6 | V | |||
IOVDD = 1.7 V to 2 V | –0.3 | 0.3 | V | ||||
Digital input current (IIN) | ±1 | ±10 | µA | ||||
Digital input capacitance | 5 | pF | |||||
DIGITAL OUTPUT(2) | |||||||
High-level output voltage, VOH | IOVDD = 2.7 V to 3.3 V, IOH = –1 mA | IOVDD – 0.2 | V | ||||
IOVDD = 1.7 V to 2 V, IOH = –500 μA | IOVDD – 0.2 | V | |||||
Low-level output voltage, VOL | IOVDD = 2.7 V to 3.3 V, IOL = 1 mA | 0.2 | V | ||||
IOVDD = 1.7 to 2 V, IOL = 500 μA | 0.2 | V | |||||
POWER SUPPLY | |||||||
AVDD | 2.7 | 3 | 3.3 | V | |||
IOVDD | 1.7 | AVDD | V | ||||
AIDD | VIH = IOVDD, VIL = DGND | 0.75 | 1.2 | mA | |||
IOIDD | VIH = IOVDD, VIL = DGND | 1 | 10 | µA | |||
AIDD power-down | PDN pin = IOVDD | 25 | 50 | µA | |||
Power dissipation | AVDD = 3 V | 2.3 | 3.6 | mW |