JAJSI70C May 2008 – November 2019 DAC9881
PRODUCTION DATA.
All digital input and output pins are compatible with any logic supply voltage between 1.8 V and 5 V. Connect the interface logic supply voltage to the IOVDD pin. Although timing is specified down to 2.7 V (see the timing diagrams), IOVDD can operate as low as 1.8 V, but with degraded timing and temperature performance. For the lowest power consumption, logic VIH levels should be as close as possible to IOVDD, and logic VIL levels should be as close as possible to GND.