JAJSI70C May 2008 – November 2019 DAC9881
PRODUCTION DATA.
For the device to work properly, IOVDD must not come up before AVDD, and the reference voltage must come up after the AVDD supply. Additionally, because the DAC input shift register is not reset during a power-on reset or hardware reset, the CS pin must not be unintentionally asserted during power-up of the device. To avoid improper power-up, it is recommended that the CS and LDAC pins be connected to IOVDD through pullup resistors. To make sure that the electrostatic discharge (ESD) protection circuitry of this device is not activated, all other digital pins must be held at ground potential until IOVDD is applied.