JAJSI70C May 2008 – November 2019 DAC9881
PRODUCTION DATA.
The Sample/Track and Hold modes of operation correspond to the state of the switch, which connects the DAC output to the hold capacitor CH. In sample mode – also referred to as track mode -- the switch is closed, allowing the capacitor to charge or discharge to the sampled DAC output voltage. The operational amplifier is configured as a buffer, which tracks and relays the voltage seen across CH to the output of the circuit. In hold mode, the switch opens, disconnecting CH from the DAC output. The DAC is updated while the circuit is in hold mode, preventing any DAC major carry glitches from propagating to the S&H output. The capacitor retains the previous sampled voltage, and this value is buffered to the output of the circuit. In real circuits, switch leakage and operational amplifier input bias current must be considered as it will impact circuit performance. The switch is generally controlled by an external discrete or digital driver.
After the DAC glitch relays, the switch closes and re-enters sample or track mode.
More information related to this circuit can be found in Sample and Hold Glitch Reduction for Precision Outputs Design Guide (TIDU022).