JAJSMO5C August   2000  – August 2021 DCV010505 , DCV010505D , DCV010512 , DCV010512D , DCV010515 , DCV010515D , DCV011512D , DCV011515D , DCV012405 , DCV012415D

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1  Isolation
        1. 8.3.1.1 Operation or Functional Isolation
        2. 8.3.1.2 Basic or Enhanced Isolation
        3. 8.3.1.3 Working Voltage
        4. 8.3.1.4 Isolation Voltage Rating
        5. 8.3.1.5 Repeated High-Voltage Isolation Testing
      2. 8.3.2  Power Stage
      3. 8.3.3  Oscillator and Watchdog Circuit
      4. 8.3.4  Thermal Shutdown
      5. 8.3.5  Synchronization
      6. 8.3.6  Light Load Operation (< 10%)
      7. 8.3.7  Load Regulation (10% to 100%)
      8. 8.3.8  Construction
      9. 8.3.9  Thermal Management
      10. 8.3.10 Power-Up Characteristics
    4. 8.4 Device Functional Modes
      1. 8.4.1 Disable and Enable (SYNCIN Pin)
      2. 8.4.2 Decoupling
        1. 8.4.2.1 Ripple Reduction
        2. 8.4.2.2 Connecting the DCV01 in Series
        3. 8.4.2.3 Connecting the DCV01 in Parallel
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input Capacitor
        2. 9.2.2.2 Output Capacitor
        3. 9.2.2.3 SYNCIN Pin
        4. 9.2.2.4 PCB Design
        5. 9.2.2.5 Decoupling Ceramic Capacitors
        6. 9.2.2.6 Input Capacitor and the Effects of ESR
        7. 9.2.2.7 Ripple and Noise
          1. 9.2.2.7.1 Output Ripple Calculation Example
        8. 9.2.2.8 Dual DCV01 Output Voltage
        9. 9.2.2.9 Optimizing Performance
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Device Nomenclature
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 ドキュメントの更新通知を受け取る方法
    4. 12.4 サポート・リソース
    5. 12.5 Trademarks
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 用語集
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3.1.2 Basic or Enhanced Isolation

Basic or enhanced isolation is defined by specified creepage and clearance limits between the primary and secondary circuits of the power supply. Basic isolation is the use of an isolation barrier in addition to the insulated wire in the construction of the transformer. Input and output circuits must also be physically separated by specified distances.

Note:

The DCV01 products do not provide basic or enhanced isolation.