Over operating free-air temperature range (unless otherwise noted)(1)
(2)
|
MIN |
NOM |
MAX |
UNIT |
SUPPLY
VOLTAGE RANGE(3) |
VDD |
Supply voltage for LVCMOS core logic Supply voltage for LPSDR low-speed
interface |
1.65 |
1.8 |
1.95 |
V |
VDDI |
Supply voltage for SubLVDS
receivers |
1.65 |
1.8 |
1.95 |
V |
VOFFSET |
Supply voltage for HVCMOS and micromirror
electrode(4) |
9.5 |
10 |
10.5 |
V |
VBIAS |
Supply voltage for micromirror electrode |
17.5 |
18 |
18.5 |
V |
VRESET |
Supply voltage for micromirror
electrode |
–14.5 |
–14 |
–13.5 |
V |
|VDDI–VDD| |
Supply voltage delta (absolute
value)(5) |
|
|
0.3 |
V |
|VBIAS–VOFFSET| |
Supply voltage delta (absolute
value)(6) |
|
|
10.5 |
V |
|VBIAS–VRESET| |
Supply voltage delta (absolute
value)(7) |
|
|
33 |
V |
CLOCK
FREQUENCY |
ƒclock |
Clock frequency for low speed interface
LS_CLK(8) |
108 |
|
120 |
MHz |
ƒclock |
Clock frequency for high speed interface
DCLK(9) |
300 |
|
540 |
MHz |
|
Duty cycle distortion DCLK |
44% |
|
56% |
|
SUBLVDS
INTERFACE(9) |
|VID| |
SubLVDS input differential voltage
(absolute value). See Figure 6-8, Figure 6-9 |
150 |
250 |
350 |
mV |
VCM |
Common mode voltage. See Figure 6-8, Figure 6-9 |
700 |
900 |
1100 |
mV |
VSUBLVDS |
SubLVDS voltage. See Figure 6-8, Figure 6-9 |
575 |
|
1225 |
mV |
ZLINE |
Line differential impedance
(PWB/trace) |
90 |
100 |
110 |
Ω |
ZIN |
Internal differential termination
resistance. See Figure 6-10 |
80 |
100 |
120 |
Ω |
|
100-Ω differential PCB
trace |
6.35 |
|
152.4 |
mm |
ENVIRONMENTAL |
TARRAY |
Array Temperature – long-term
operational(10)
(11)
(12)
(13) |
0 |
|
40 to 70(12) |
°C |
Array Temperature –
short-term operational, 25 hr max(11)
(14) |
-20 |
|
–10 |
°C |
Array Temperature –
short-term operational, 500 hr max(11)
(14) |
-10 |
|
0 |
°C |
Array Temperature –
short-term operational, 500 hr max(11)
(14) |
70 |
|
75 |
°C |
TWINDOW |
Window Temperature – operational(15)
(16) |
|
|
90 |
°C |
|TDELTA| |
Absolute temperature delta
between any point on the window edge and the ceramic test point
TP1(17) |
|
|
15 |
°C |
TDP-AVG |
Average dew point
temperature (non-condensing) (18) |
|
|
24 |
°C |
TDP-ELR |
Elevated dew point
temperature range (non-condensing) (19) |
28 |
|
36 |
°C |
CTELR |
Cumulative time in
elevated dew point temperature range |
|
|
6 |
months |
ILLUMINATION |
ILLUV |
Illumination power at wavelengths <
410 nm(10) |
|
|
10 |
mW/cm2 |
ILLVIS |
Illumination power at wavelengths ≥ 410
nm and ≤ 800 nm(20) |
|
|
26.1 |
W/cm2 |
ILLIR |
Illumination power at wavelengths >
800 nm |
|
|
10 |
mW/cm2 |
ILLBLU |
Illumination power at wavelengths ≥ 410
nm and ≤ 475 nm(20) |
|
|
8.3 |
W/cm2 |
ILLBLU1 |
Illumination power at wavelengths ≥ 410
nm and ≤ 445 nm(20) |
|
|
1.5 |
W/cm2 |
ILLθ |
Illumination marginal ray angle(15) |
|
|
55 |
deg |
(1) The functional performance of the device specified in this data
sheet is achieved when operating the device within the limits defined by the
Section 6.4. No level of performance is implied when operating the device above
or below the
Section 6.4 limits.
(2) The following power supplies are all required to operate the
DMD: VDD, VDDI, VOFFSET, VBIAS, and
VRESET. All VSS connections are also required.
(3) All voltage values are with respect to the ground pins
(VSS).
(4) VOFFSET supply transients must fall within specified
max voltages.
(5) To prevent excess current, the supply voltage delta
|VDDI – VDD| must be less than the specified
limit.
(6) To prevent excess current, the supply voltage delta
|VBIAS – VOFFSET| must be less than the specified
limit.
(7) To prevent excess current, the supply voltage delta
|VBIAS – VRESET| must be less than the specified
limit.
(8) LS_CLK must run as specified to ensure internal DMD timing for
reset waveform commands.
(9) Refer to the SubLVDS timing requirements in
Section 6.7.
(10) Simultaneous exposure of the DMD to the maximum Recommended
Operating Conditions for temperature and UV illumination will reduce
device lifetime.
(11) The array temperature cannot be measured directly and must be
computed analytically from the temperature measured at test point 1 (TP1) shown
in
Figure 7-1 and the package thermal resistance using
Section 7.6.
(12) Per
Figure 6-1, the maximum operational array temperature should be derated based on the
micromirror landed duty cycle that the DMD experiences in the end application.
Refer to
Section 7.8 for a definition of micromirror landed duty cycle.
(13) Long-term is defined as the usable life of the device.
(14) Short-term is the total cumulative time over the useful life of
the device.
(15) The maximum marginal ray angle of the incoming illumination
light at any point in the micromirror array, including at the pond of
micromirrors (POM), should not exceed 55 degrees from the normal to the device
array plane. The device window aperture has not necessarily been designed to
allow incoming light at higher maximum angles to pass to the micromirrors, and
the device performance has not been tested nor qualified at angles exceeding
this. Illumination light exceeding this angle outside the micromirror array
(including POM) will contribute to thermal limitations described in this
document and may negatively affect lifetime.
(16) Window temperature is the highest temperature on the window
edge shown in
Figure 7-1. The location of thermal test point TP2 in
Figure 7-1 is intended to measure the highest window edge temperature. If a particular
application causes another point on the window edge to be at a higher
temperature, that point should be used.
(17) Temperature delta is the highest difference between the ceramic
test point 1 (TP1) and anywhere on the window edge shown in
Figure 7-1. The window test point TP2 shown in
Figure 7-1 is intended to result in the worst-case delta temperature. If a particular
application causes another point on the window edge to result in a larger delta
temperature, that point should be used.
(18) The average over time (including storage and operating) that
the device is not in the 'elevated dew point temperature range'.
(19) Exposure to dew point temperatures in the elevated range during
storage and operation should be limited to less than a total cumulative time of
CTELR.
(20) The maximum allowable optical
power incident on the DMD is limited by the maximum optical power density for
each wavelength range specified and the micromirror array temperature
(TARRAY).