JAJSLA9 データシート

JAJSLA9E may 2015 – april 2023 DLP7000UV

PRODUCTION DATA

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

FLP|203
- MCLC005B

サーマルパッド・メカニカル・データ

発注情報

jajsla9e_oa

7.4 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) ⁽¹⁾

			MIN	NOM	MAX	UNIT
ELECTRICAL
V_CC	Supply voltage for LVCMOS core logic ⁽²⁾ ⁽³⁾		3.0	3.3	3.6	V
V_CCI	Supply voltage for LVDS receivers ⁽²⁾ ⁽³⁾		3.0	3.3	3.6	V
V_CC2	Mirror electrode and HVCMOS supply voltage ⁽²⁾ ⁽³⁾		7.25	7.5	7.75	V
V_MBRST	Clocking pulse waveform voltage applied to MBRST[15:0] input pins (supplied by DLPA200)		–27		26.5	V
\|V_CC – V_CCI\|	Supply voltage delta (absolute value) ⁽³⁾				0.3	V
ENVIRONMENTAL
	Illumination power density ⁽⁴⁾ ⁽¹³⁾	< 363 nm ⁽¹²⁾			2	mW/cm²
		363 to 400 nm ⁽¹¹⁾			2.5	W/cm²
		363 to 400 nm ⁽¹¹⁾			3.7	W
		400 to 420 nm ⁽¹¹⁾			11	W/cm²
		400 to 420 nm ⁽¹¹⁾			16.2	W
		363 to 420 nm total ⁽¹⁰⁾⁽¹¹⁾			11	W/cm²
		363 to 420 nm total ⁽¹⁰⁾⁽¹¹⁾			16.2	W
		> 420 nm	Thermally limited ⁽¹¹⁾			W/cm²
T_C	Case/array temperature ⁽⁸⁾⁽⁹⁾		20		30 ⁽⁷⁾	°C
T_GRADIENT	Device temperature gradient – operational ⁽⁶⁾				10	°C
RH	Relative humidity (non-condensing)				95	%RH
	Operating landed duty cycle ⁽⁵⁾			25%

(1) The functional performance of the device specified in this datasheet is achieved when operating the device within the limits defined by the Recommended Operating Conditions. No level of performance is implied when operating the device above or below the Recommended Operating Conditions limits.

(2) All voltages referenced to VSS (ground).

(3) Voltages V_CC, V_CCI, and V_CC2, are required for proper DMD operation.

(4) Various application parameters can affect optimal, long-term performance of the DMD, including illumination spectrum, illumination power density, micromirror landed duty cycle, ambient temperature (both storage and operating), case temperature, and power-on or power-off duty cycle. TI recommends that application-specific effects be considered as early as possible in the design cycle.

(5) Landed duty cycle refers to the percentage of time an individual micromirror spends landed in one state (12° or –12°) versus the other state (–12° or 12°).

(6) As either measured, predicted, or both between any two points -- measured on the exterior of the package, or as predicted at any point inside the micromirror array cavity. Refer to Case Temperature and Section 8.6.

(7) Refer to Section 8.6 for thermal test point locations, package thermal resistance, and device temperature calculation.

(8) Temperature is the highest measured value of any test point shown in Figure 17 or the active array as calculated by the Section 8.6.

(9) In some applications, the total DMD heat load can be dominated by the amount of incident light energy absorbed. Refer to Section 8.6 for further details.

(10) The total integrated illumination power density from 363 to 420 nm shall not exceed 11 W/cm² (or 16.2 W evenly distributed on the active array area). Therefore if 2.5 W/cm² of illumination is used in the 363 to 400 nm range, then illumination in the 400 to 420 nm range must be limited to 8.5 W/cm².

(11) Also limited by the resulting micromirror array temperature. Refer to Section 8.6.2 and Section 8.6 for information related to calculating the micromirror array temperature.

(12) The maximum operating conditions for operating temperature and illumination power density for wavelengths < 363 nm should not be implemented simultaneously.

(13) Total integrated illumination power density, above or below the indicated wavelength threshold or in the indicated wavelength range.