DLPS082 February   2017 DLPA100

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1. 3.1 Typical Application Diagram
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Storage Conditions
    3. 6.3 ESD Ratings
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Power Up Sequencing
      2. 7.3.2  Power Down Sequencing
      3. 7.3.3  Shutdown
        1. 7.3.3.1 Thermal
      4. 7.3.4  System Reset
      5. 7.3.5  Interrupt Logic
      6. 7.3.6  Serial Communications Port
      7. 7.3.7  Switching Regulators
        1. 7.3.7.1 Output Voltage - VOUT
        2. 7.3.7.2 Adjustable Linear Regulator - VLIN1
        3. 7.3.7.3 Adjustable Linear Regulator Control - VLIN2
      8. 7.3.8  Fan Controllers
      9. 7.3.9  Color Wheel Motor Driver
        1. 7.3.9.1 Color Wheel Motor Driver Power Dissipation
      10. 7.3.10 Color Wheel Switching Regulator Supply
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Grounding Guidelines
      1. 10.2.1 Completely Isolated Ground Regions
      2. 10.2.2 Single Isolated Ground Region
      3. 10.2.3 Non-isolated Common Ground Region
    3. 10.3 Thermal Guidelines
    4. 10.4 Motor Control Guidelines
    5. 10.5 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Markings
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Package Option Addendum
      1. 12.1.1 Packaging Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
  • DLP|48
サーマルパッド・メカニカル・データ

10.1 Layout Guidelines

The 12-V supply, VBB, should be provided on a separate plane, or portion of a shared power distribution plane. Each ceramic filter capacitor should be placed as close as possible to each VBB terminal: pins 9, 22, 37 and 42. The additional reservoir capacitor should also be placed as close as possible to the VBB terminals. The ground for VBB should be routed directly to the DLPA100 thermal pad connection.

The PWB traces used on the switching regulators should be as short and wide as possible. The electrical loops formed between the VBB filter capacitors, input switch (LX pins), inductor, output capacitor and the diode should be as small as possible.

An adjacent layer ground region covering the entire switching node should be provided for the pins: LXC (pin 25), LX5 (pin 23), LX33 (pin 43), LX25 (pin 41), and VMSW (pin10). Each of the switching nodes and all associated components should be located as near the DLPA100 device as possible.

Avoid routing any noise sensitive signals near the DLPA100 device switching nodes and associated ground regions. The sensitive pins on the DLPA100 device consist of pins 1, 2, 3, 4, 5, 6, 8, and 48. If sensitive signals must be routed across the switching loops, use subdivided planes and/or multiple ground planes to avoid interference. Use of shielded inductors on the switching regulator circuits will minimize the possibility of crosstalk and interference.

High current paths should have an adequate number of vias to minimize resistance and inductance. Placement and routing priority should be given to the higher current circuits. For example, the VCORE supply should take precedence over a fan PWM output. The following is the order of precedence from highest to lowest:

  1. VCORE
  2. V5
  3. V3P3
  4. V2P5
  5. VM
  6. VLIN2
  7. VLIN1
  8. FAN1, FAN2, FAN3

Suitable kelvin connections should be provided for the regulator feedback pins: FBC (pin 30), V2P5 (pin 46), V3P3 (pin 45), V5 (pin 24), FB1 (pin 31) & FB2 (pin 32) and for sense pins: SENSE (pin 14), ISEN (pin 28) & ISENK (pin 27). Also note that the external feedback networks used for the VCORE and VLIN1 regulators should also deploy kelvin connections. The feedback pin traces FBC, FB1, FB2 are most prone to interference and should be located near the DLPA100 device.