JAJSGQ4G
april 2010 – june 2023
DLPA200
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Device Configurations Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics Control Logic
7.6
5-V Linear Regulator
7.7
Bias Voltage Boost Converter
7.8
Reset Voltage Buck-Boost Converter
7.9
VOFFSET/DMDVCC2 Regulator
7.10
Switching Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
5-V Linear Regulator
8.3.2
Bias Voltage Boost Converter
8.3.3
Reset Voltage Buck-Boost Converter
8.3.4
VOFFSET/DMDVCC2 Regulator
8.3.5
Serial Communications Port (SCP)
9
Application and Implementation
9.1
Application Information
9.1.1
Component Selection Guidelines
10
Power Supply Recommendations
10.1
Power Supply Rail Guidelines
11
Layout
11.1
Layout Guidelines
11.1.1
Grounding Guidelines
11.2
Thermal Considerations
12
Device and Documentation Support
12.1
Device Support
12.1.1
Device Nomenclature
12.2
Documentation Support
12.2.1
Related Documentation
12.3
サポート・リソース
12.4
Trademarks
12.5
静電気放電に関する注意事項
12.6
用語集
13
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
PFP|80
MPQF049B
サーマルパッド・メカニカル・データ
PFP|80
PPTD014N
発注情報
jajsgq4g_oa
Data Sheet
DLPA200 デジタル・マイクロミラー・デバイス・ドライバ