JAJSF34B November 2017 – May 2022 DLPC120-Q1
PRODUCTION DATA
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
PIN | I/O | I/O | CLOCK | ||
---|---|---|---|---|---|
NAME | NO. | POWER | TYPE | SYSTEM | DESCRIPTION |
AUXBIT_0 (FLICKER_SELECT) | C13 | 3.30 V | O6 | Async | This pin is configured by default to be asserted at the lowest brightness mode to activate flicker reduction logic in the LED driver circuit. It is deasserted, otherwise, to deactivate the flicker reduction logic for normal operation. Contact a TI Applications Engineer for implementation details. |
AUXBIT_1 | B14 | O6 | Async | DMD sequencer reset AUX Bit 1. Intended for system debug. Can be routed to a testpoint or left unconnected | |
AUXBIT_2 | A15 | O6 | Async | DMD sequencer reset AUX Bit 2. Intended for system debug. Can be routed to a testpoint or left unconnected | |
AUXBIT_6 | D11 | O6 | Async | DMD sequencer reset AUX Bit 6. Intended for system debug. Can be routed to a testpoint or left unconnected | |
AUXBIT_7 | B13 | O6 | Async | DMD sequencer reset AUX Bit 7. Intended for system debug. Can be routed to a testpoint or left unconnected |