8.6.57 CDLAR6_Register Register (Offset = 0x18A) [reset = 0x0]
CDLAR6_Register is shown in Table 69.
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Table 69. CDLAR6_Register Register Field Descriptions
Bit |
Field |
Type |
Reset |
Description |
15-12 |
RESERVED |
R |
0x0 |
Reserved
|
11 |
TD_Peak_Polarity_1 |
|
0x0 |
Polarity of the First peak discovered by the TDR mechanism on Transmit Channel (TD).
|
10-6 |
RESERVED |
R |
0x0 |
Reserved
|
5 |
Cross_Detect_on_TD |
|
0x0 |
Cross Reflections were detected on TD. Indicate on Short between TD and TD
|
4 |
RESERVED |
R |
0x0 |
Reserved
|
3 |
RESERVED |
R |
0x0 |
Reserved
|
2 |
RESERVED |
R |
0x0 |
Reserved
|
1-0 |
RESERVED |
R |
0x0 |
Reserved
|