15 |
RESERVED |
R |
0x0 |
Reserved
|
14 |
MDI/MDIX_Mode |
|
0x0 |
MDI/MDIX Mode Status:
0x0 = MDI Pairs normal (Receive on RD pair, Transmit on TD pair)
0x1 = MDI Pairs swapped (Receive on TD pair, Transmit on RD pair)
|
13 |
Receive_Error_Latch |
H |
0x0 |
Receive Error Latch: This bit will be cleared upon a read of the RECR register
0x0 = No receive error event has occurred
0x1 = Receive error event has occurred since last read of RXERCNT register (0x0015)
|
12 |
Polarity_Status |
H |
0x0 |
Polarity Status: This bit is a duplication of bit [4] in the 10BTSCR register (0x001A). This bit will be cleared upon a read of the 10BTSCR register, but not upon a read of the PHYSTS register.
0x0 = Correct Polarity detected
0x1 = Inverted Polarity detected
|
11 |
False_Carrier_Sense_Latch |
H |
0x0 |
False Carrier Sense Latch: This bit will be cleared upon a read of the FCSR register.
0x0 = No False Carrier event has occurred
0x1 = False Carrier even has occurred since last read of FCSCR register (0x0014)
|
10 |
Signal_Detect |
|
0x0 |
Signal Detect: Active high 100Base-TX unconditional Signal Detect indication from PMD
|
9 |
Descrambler_Lock |
|
0x0 |
Descrambler Lock: Active high 100Base-TX Descrambler Lock indication from PMD
|
8 |
Page_Received |
|
0x0 |
Link Code Word Page Received: This bit is a duplicate of Page Received (bit [1]) in the ANER register and it is cleared on read of the ANER register (0x0006).
0x0 = Link Code Word Page has not been received
0x1 = A new Link Code Word Page has been received
|
7 |
MII_Interrupt |
H |
0x0 |
MII Interrupt Pending: Interrupt source can be determined by reading the MISR register (0x0012). Reading the MISR will clear this interrupt bit indication.
0x0 = No interrupt pending
0x1 = Indicates that an internal interrupt is pending
|
6 |
Remote_Fault |
|
0x0 |
Remote Fault: Cleared on read of BMSR register (0x0001) or by reset.
0x1 = Remote Fault condition detected. Fault criteria: notification from link partner of Remote Fault via Auto-Negotiation 0h = No Remote Fault condition detected
|
5 |
Jabber_Detect |
|
0x0 |
Jabber Detection: This bit is only for 10 Mbps operation. This bit is a duplicate of the Jabber Detect bit in the BMSR register (0x0001) and will not be cleared upon a read of the PHYSTS register.
0x0 = No Jabber
0x1 = Jabber condition detected
|
4 |
Auto-Negotiation_Status |
|
0x0 |
Auto-Negotiation Status:
0x0 = Auto-Negotiation not complete
0x1 = Auto-Negotiation complete
|
3 |
MII_Loopback_Status |
|
0x0 |
MII Loopback Status:
0x0 = Normal operation
0x1 = Loopback enabled
|
2 |
Duplex_Status |
|
0x0 |
Duplex Status:
0x0 = Half-Duplex mode
0x1 = Full-Duplex mode
|
1 |
Speed_Status |
|
0x0 |
Speed Status:
0x0 = 100 Mbps mode
0x1 = 10 Mbps mode
|
0 |
Link_Status |
|
0x0 |
Link Status: This bit is duplicated from the Link Status bit in the BMSR register ( address 0x0001) and will not be cleared upon a read of the PHYSTS register.
0x0 = No link established
0x1 = Valid link established (for either 10 Mbps or 100 Mbps)
|