JAJSJF5B April 2021 – January 2023 DP83TC812R-Q1 , DP83TC812S-Q1
PRODUCTION DATA
The DP83TC812S-Q1 can be set to respond to any of 9 possible PHY addresses through bootstrap pins. The PHY address is latched into the device upon power-up or hardware reset. Each PHY on the serial management bus in the system must have a unique PHY address.
By default, DP83TC812S-Q1 will latch to a PHY address of 0 (<0b00000>). This address can be changed by adding pullup resistors to bootstrap pins found in #GUID-5A0D6E06-653E-4786-BE80-F1CFB5424068.