JAJSON9 May 2022 DP83TC813R-Q1 , DP83TC813S-Q1
PRODUCTION DATA
100BASE-T1 Master and 100BASE-T1 Slave are configured using either hardware bootstraps or through register access.
RX_D3 controls the 100BASE-T1 Master and 100BASE-T1 Slave bootstrap configuration. By default, 100BASE-T1 Slave mode is configured because there is an internal pulldown resistor on LED_0 pin. If 100BASE-T1 Master mode configuration through hardware bootstrap is preferred, an external pullup resistor is required.
Additionally, bit[14] in the MMD1_PMA_CTRL_2 Register (Address 0x1834) controls the 100BASE-T1 Master and 100BASE-T1 Slave configuration. When this bit is set, 100BASE-T1 Master mode is enabled.