JAJSJF3
December 2021
DP83TC814R-Q1
,
DP83TC814S-Q1
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
Timing Diagrams
7.8
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Diagnostic Tool Kit
8.3.1.1
Signal Quality Indicator
8.3.1.2
Electrostatic Discharge Sensing
8.3.1.3
Time Domain Reflectometry
8.3.1.4
Voltage Sensing
8.3.1.5
BIST and Loopback Modes
8.3.1.5.1
Data Generator and Checker
8.3.1.5.2
xMII Loopback
8.3.1.5.3
PCS Loopback
8.3.1.5.4
Digital Loopback
8.3.1.5.5
Analog Loopback
8.3.1.5.6
Reverse Loopback
8.3.2
Compliance Test Modes
8.3.2.1
Test Mode 1
8.3.2.2
Test Mode 2
8.3.2.3
Test Mode 4
8.3.2.4
Test Mode 5
8.4
Device Functional Modes
8.4.1
Power Down
8.4.2
Reset
8.4.3
Standby
8.4.4
Normal
8.4.5
Media Dependent Interface
8.4.5.1
100BASE-T1 Master and 100BASE-T1 Slave Configuration
8.4.5.2
Auto-Polarity Detection and Correction
8.4.5.3
Jabber Detection
8.4.5.4
Interleave Detection
8.4.6
MAC Interfaces
8.4.6.1
Media Independent Interface
8.4.6.2
Reduced Media Independent Interface
8.4.6.3
Reduced Gigabit Media Independent Interface
8.4.7
Serial Management Interface
8.4.8
Direct Register Access
8.4.9
Extended Register Space Access
8.4.10
Write Address Operation
8.4.10.1
MMD1 - Write Address Operation
8.4.11
Read Address Operation
8.4.11.1
MMD1 - Read Address Operation
8.4.12
Write Operation (No Post Increment)
8.4.12.1
MMD1 - Write Operation (No Post Increment)
8.4.13
Read Operation (No Post Increment)
8.4.13.1
MMD1 - Read Operation (No Post Increment)
8.4.14
Write Operation (Post Increment)
8.4.14.1
MMD1 - Write Operation (Post Increment)
8.4.15
Read Operation (Post Increment)
8.4.15.1
MMD1 - Read Operation (Post Increment)
8.5
Programming
8.5.1
Strap Configuration
8.5.2
LED Configuration
8.5.3
PHY Address Configuration
8.6
Register Maps
8.6.1
Register Access Summary
8.6.2
DP83TC814 Registers
9
Application and Implementation
9.1
Application Information
9.2
Typical Applications
9.2.1
Design Requirements
9.2.1.1
Physical Medium Attachment
9.2.1.1.1
Common-Mode Choke Recommendations
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.1.1
Signal Traces
11.1.2
Return Path
11.1.3
Metal Pour
11.1.4
PCB Layer Stacking
11.2
Layout Example
12
Device and Documentation Support
12.1
Receiving Notification of Documentation Updates
12.2
サポート・リソース
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RHA|36
MPQF611A
サーマルパッド・メカニカル・データ
RHA|36
QFND711
発注情報
jajsjf3_oa
11.1
Layout Guidelines