JAJSCC6A June   2016  – July 2016 DRV2511-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input and Configurable Pre-amplifier
      2. 7.3.2 Pulse-Width Modulator (PWM)
      3. 7.3.3 Designed for low EMI
      4. 7.3.4 Device Protection Systems
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation in Shutdown Mode
      2. 7.4.2 Operation in Standby Mode
      3. 7.4.3 Operation in Active Mode
    5. 7.5 Programming
      1. 7.5.1 Gain
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Single-Ended Source
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Optional Components
          2. 8.2.1.2.2 Capacitor Selection
          3. 8.2.1.2.3 Solenoid Selection
          4. 8.2.1.2.4 Output Filter Considerations
        3. 8.2.1.3 Application Curves
        4. 8.2.1.4 Differential Input Diagram
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 11.2 商標
    3. 11.3 静電気放電に関する注意事項
    4. 11.4 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

DAP Package
32-Pin HTSSOP
Top View
DRV2511-Q1 tssop_slos916.gif

Pin Functions

PIN TYPE DESCRIPTION
NAME NO.
GND 1, 9, 10, 11, 22, 25, 28 P Ground.
EN 2 I Device enable pin.
INTZ 3 O General fault reporting. Open drain.
INTZ = High, normal operation
INTZ = Low, fault condition
IN+ 4 I Positive differential input.
IN- 5 I Negative differential input.
REG 6, 7 P Internally generated gate voltage supply. Not to be used as a supply or connected to any component other than a 1 µF X7R ceramic decoupling capacitor and the MODE resistor divider.
GAIN 8 I Selects Gain.
STDBY 12 I Standby pin.
FS2 13 I Output switching frequency selection.
FS1 14 I Output switching frequency selection.
FS0 15 I Output switching frequency selection.
N/C 16 N/C Pin should be left floating.
AVDD 17 P Analog Supply, can be connected to VBAT for single power supply operation.
PVDD 18, 19, 31, 32 P Power supply.
BSTN 20, 24 P Boot strap for negative output, connect to 220 nF X5R, or better ceramic cap to OUT-.
OUT- 21, 23 O Negative output.
BSTP 26, 30 P Boot strap for positive output, connect to 220 nF X5R, or better ceramic cap to OUT+.
OUT+ 27, 29 O Positive output.
Thermal Pad or
PowerPAD™		 G Connect to GND for best system performance. If not connected to GND, leave floating.