SLVSCX2B August 2015 – February 2016 DRV8305
PRODUCTION DATA.
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The DRV8305 is a gate driver IC designed to drive a 3-phase BLDC motor in combination with external power MOSFETs. The device provides a high level of integration with three half-bridge gate drivers, three current shunt amplifiers, adjustable slew rate control, logic LDO, and a suite of protection features.
The following design is a common application of the DRV8305.
DESIGN PARAMETER | REFERENCE | VALUE |
---|---|---|
Supply voltage | PVDD | 12 V |
Motor winding resistance | MR | 0.5 Ω |
Motor winding inductance | ML | 0.28 mH |
Motor poles | MP | 16 poles |
Motor rated RPM | MRPM | 2000 RPM |
Number of MOSFETs switching | NSW | 6 |
Switching frequency | fSW | 45 kHz |
IDRIVEP | IDRIVEP | 50 mA |
IDRIVEN | IDRIVEN | 60 mA |
MOSFET QG | Qg | 36 nC |
MOSFET QGD | QGD | 9 nC |
MOSFET RDS(on) | RDS(on) | 4.1 mΩ |
Target full-scale current | IMAX | 30 A |
Sense resistor | RSENSE | 0.005 Ω |
VDS trip level | VDS_LVL | 0.197 V |
Amplifier bias | VBIAS | 1.65 V |
Amplifier gain | Gain | 10 V/V |
The gate drive supply (VCP) of the DRV8305 is capable of delivering up to 30 mA (RMS) of current to the external power MOSFETs. The charge pump directly supplies the high-side N-channel MOSFETs and a 10-V LDO powered from VCP supplies the low-side N-channel MOSFETs. The designer can determine the approximate RMS load on the gate drive supply through the following equation.
Example: 36 nC (QG) × 6 (NSW) × 45 kHz (fSW) = 9.72 mA
Note that this is only a first-order approximation.
The rise and fall times of the external power MOSFET can be adjusted through the use of the DRV8305 IDRIVE setting. A higher IDRIVE setting will charge the MOSFET gate more rapidly where a lower IDRIVE setting will charge the MOSFET gate more slowly. System testing requires fine tuning to the desired slew rate, but a rough first-order approximation can be calculated as shown in the following.
Example: 9 nC (QGD) / 50 mA (IDRIVEP) = 180 ns
The DRV8305 provides overcurrent protection for the external power MOSFETs through the use of VDS monitors for both the high-side and low-side MOSFETs. These are intended for protecting the MOSFET in overcurrent conditions and are not for precise current regulation.
The overcurrent protection works by monitoring the VDS voltage drop of the external MOSFETs and comparing it against the internal VDS_LEVEL set through the SPI registers. The high-side VDS is measured across the VDRAIN and SH_X pins. The low-side VDS is measured across the SH_X and SL_X pins. If the VDS voltage exceeds the VDS_LEVEL value, the DRV8305 will take action according to the VDS_MODE register.
The overcurrent trip level can be determined with the MOSFET RDS(on) and the VDS_LEVEL setting.
Example: 0.197 V (VDS_LVL) / 4.1 mΩ (RDS(ON)) = 48 A
The DRV8305 provides three bidirectional low-side current shunt amplifiers. These can be used to sense the current flowing through each half-bridge. If individual half-bridge sensing is not required, a single current shunt amplifier can be used to measure the sum of the half-bridge current. Use this simple procedure to correctly configure the current shunt amplifiers.