JAJSL26B January 2021 – April 2022 DRV8316
PRODUCTION DATA
If the die temperature in the device exceeds the trip point of the thermal shutdown limit (TTSD), all the FETs are disabled, the buck regulator disabled, the charge pump is shut down, and the nFAULT pin is driven low. In addition, the FAULT and OT bit in the IC status (IC_STAT) register and OTS bit in the status register is set. Normal operation starts again (driver operation and the nFAULT pin is released) when the overtemperature condition clears. The OTS bit stays latched high indicating that a thermal event occurred until a clear fault command is issued either through the CLR_FLT bit or an nSLEEP reset pulse (tRST). This protection feature cannot be disabled.