JAJSO55 December 2022 DRV8317
PRODUCTION DATA
The nSLEEP pin manages the state of DRV8317. When the nSLEEP pin is low, the device goes to a low-power sleep mode. In sleep mode MOSFETs, current sense amplifiers, charge pump, AVDD regulator and SPI bus are disabled. The tSLEEP time must elapse after a falling edge on the nSLEEP pin before the device goes to sleep mode. The device comes out of sleep mode automatically if the nSLEEP pin is pulled high. The tWAKE time must elapse before the device is ready for PWM inputs.
During power up and power down of the device through the nSLEEP pin, the nFAULT pin is held low as the internal regulators are enabled or disabled. After the regulators have enabled or disabled, the nFAULT pin is automatically released. The duration that the nFAULT pin is low does not exceed the tSLEEP or tWAKE time.