JAJSO55 December 2022 DRV8317
PRODUCTION DATA
In 3x PWM mode, the INHx pin controls each half-bridge and supports two output states: low or high. To configure DRV8317H in 3x PWM mode, connect the MODE pin to AVDD or keep the MODE pin floating (Hi-Z). To enable 3x PWM mode in DRV8317S, set PWM_MODE to 10b or 11b. The INLx pin is used to put the half bridge in the Hi-Z state. If the Hi-Z state is not required, tie all INLx pins to logic high (for example, by tying them to AVDD). The corresponding INHx and INLx signals control the output state as listed in Table 8-4.
INLx | INHx | OUTx |
---|---|---|
0 | X | Hi-Z |
1 | 0 | L |
1 | 1 | H |
Figure 8-4 shows the typical application diagram of the DRV8317 configured in 3x PWM mode.