JAJSHI4 May 2019 DRV8340-Q1
PRODUCTION DATA.
In 3x PWM mode, the INHx pin controls each half-bridge and supports two output states: low or high. The INLx pin is used to put the half bridge in the Hi-Z state. If the Hi-Z state is not required, tie all INLx pins to logic high. The corresponding INHx and INLx signals control the output state as listed in Table 5.
INLx | INHx | GLx | GHx | SHx + DLx |
---|---|---|---|---|
0 | X | L | L | Hi-Z |
1 | 0 | H | L | L |
1 | 1 | L | H | H |