JAJSHI4 May 2019 DRV8340-Q1
PRODUCTION DATA.
When the EN_SHT_TST bit is set high, all the pullup current sources on the SHx pins are enabled. The voltage across each pullup source is individually measured and compared to an internal threshold (VTH). If the voltage across any of the current sources exceeds VTH, the DRV8340-Q1 device flags that as a fault condition. The nFAULT pin is driven low, and in the SPI device the FAULT, OL_SHT, and the corresponding SHT_GND_x bit is set. Figure 32 shows the internal circuit for the short-to-ground detection.
In the SPI device, depending on the load configuration, SHT_GND on one phase can latch all three SHT_GND_x bits high. To determine which phase has a short-to-ground fault condition, the external MOSFETs can be enabled and the appropriate VDS_Hx fault bit is latched indicating the faulty phase node. SHT_GND is not supported for load configurations shown in Figure 29.