SLOSEC6 Data sheet

SLOSEC6 August 2024 DRV8434A-Q1

PRODUCTION DATA

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

RGE|24
- MPQF124G

サーマルパッド・メカニカル・データ

RGE|24
- QFND723

発注情報

5.5 Electrical Characteristics

Typical values are at T_A = 25°C and V_VM = 24 V. All limits are over recommended operating conditions, unless otherwise noted.

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
POWER SUPPLIES (VM, DVDD)
I_VM	VM operating supply current	ENABLE = 1, nSLEEP = 1, No motor load		5	6.5	mA
I_VMQ	VM sleep mode supply current	nSLEEP = 0		2	4	μA
t_SLEEP	Sleep time	nSLEEP = 0 to sleep-mode	120			μs
t_RESET	nSLEEP reset pulse	nSLEEP low to clear fault	20		40	μs
t_WAKE	Wake-up time	nSLEEP = 1 to output transition		0.7	1.2	ms
t_ON	Turn-on time	VM > UVLO to output transition		0.7	1.2	ms
t_EN	Enable time	ENABLE = 0/1 to output transition			1	ms
V_DVDD	Internal regulator voltage	No external load, 6V < V_VM < 48V	4.75	5	5.25	V
V_DVDD	Internal regulator voltage	No external load, V_VM = 4.5V	4.2	4.4		V
CHARGE PUMP (VCP, CPH, CPL)
V_VCP	VCP operating voltage	6V < V_VM < 48V		V_VM + 5		V
f_(VCP)	Charge pump switching frequency	V_VM > UVLO; nSLEEP = 1		390		kHz
LOGIC-LEVEL INPUTS (STEP, DIR, nSLEEP)
V_IL	Input logic-low voltage		0		0.6	V
V_IH	Input logic-high voltage		1.5		5.5	V
V_HYS	Input logic hysteresis			150		mV
I_IL	Input logic-low current	V_IN = 0 V	–1		1	μA
I_IH	Input logic-high current	V_IN = 5 V			100	μA
TRI-LEVEL INPUTS (M0, ENABLE)
V_I1	Input logic-low voltage	Tied to GND	0		0.6	V
V_I2	Input Hi-Z voltage	Hi-Z	1.8	2	2.2	V
V_I3	Input logic-high voltage	Tied to DVDD	2.7		5.5	V
I_O	Output pull-up current			10.5		μA
QUAD-LEVEL INPUT (M1, STL_MODE)
V_I1	Input logic-low voltage	Tied to GND	0		0.6	V
V_I2		330kΩ ± 5% to GND	1	1.25	1.4	V
V_I3	Input Hi-Z voltage	Hi-Z	1.8	2	2.2	V
V_I4	Input logic-high voltage	Tied to DVDD	2.7		5.5	V
I_IL	Output pull-up current			10.5		μA
TORQUE COUNT INPUT/ STALL THRESHOLD OUTPUT (TRQ_CNT/STL_TH)
V_O1	Output low voltage	STL_MODE = 0V	0.2			V
V_O2	Output High voltage	STL_MODE = 0V			2.3	V
V_I1	Input low voltage	STL_MODE = DVDD	0.2			V
V_I2	Input High voltage	STL_MODE = DVDD			2.3	V
N_BIT	Torque-count DAC Resolution			12		Bits
C_LOAD	TRQ_CNT/STL_TH pin Capacitive Load	R_LOAD = Infinite, Phase margin = 45°			1	nF
I_SHORT	TRQ_CNT/STL_TH pin short-circuit current	Full scale output shorted to GND		3		mA
CONTROL OUTPUTS (nFAULT, STL_REP)
V_OL	Output logic-low voltage	I_O = 5 mA			0.5	V
I_OH	Output logic-high leakage		–1		1	μA
V_IL	Input logic-low voltage	STL_REP, pulled low to disable stall reporting	0		0.6	V
V_IH	Input logic-high voltage	STL_REP, pulled high to enable stall reporting	1.5		5.5	V
MOTOR DRIVER OUTPUTS (AOUT1, AOUT2, BOUT1, BOUT2)
R_DS(ON)	High-side FET on resistance	T_J = 25 °C, I_O = -1 A		165	200	mΩ
		T_J = 125 °C, I_O = -1 A		240	300	mΩ
		T_J = 150 °C, I_O = -1 A		260	350	mΩ
R_DS(ON)	Low-side FET on resistance	T_J = 25 °C, I_O = 1 A		165	210	mΩ
		T_J = 125 °C, I_O = 1 A		240	300	mΩ
		T_J = 150 °C, I_O = 1 A		260	350	mΩ
t_SR	Output slew rate	V_VM = 24 V, I_O = 1 A, Between 10% and 90%		240		V/µs
PWM CURRENT CONTROL (VREF)
K_V	Transimpedance gain	VREF = 3.3 V	1.254	1.32	1.386	V/A
I_VREF	VREF Leakage Current	VREF = 3.3 V			8.25	μA
ΔI_TRIP	Current trip accuracy	0.25 A < I_O < 0.5 A	–12		12	%
		0.5 A < I_O < 1 A	–6		6
		1 A < I_O < 2.5 A	–4		4
I_O,CH	AOUT and BOUT current matching	I_O = 2.5 A	–2.5		2.5	%
PROTECTION CIRCUITS
V_UVLO	VM UVLO lockout	VM falling, UVLO falling	4.1	4.2	4.35	V
V_UVLO	VM UVLO lockout	VM rising, UVLO rising	4.2	4.3	4.45	V
V_UVLO,HYS	Undervoltage hysteresis	Rising to falling threshold		120		mV
V_CPUV	Charge pump undervoltage	VCP falling; CPUV report		V_VM + 2		V
I_OCP	Overcurrent protection	Current through any FET	4			A
t_OCP	Overcurrent deglitch time			2		μs
t_RETRY	Overcurrent retry time			4		ms
t_OL	Open load detection time				65	ms
I_OL	Open load current threshold			100		mA
T_OTSD	Thermal shutdown	Die temperature T_J	150	165	180	°C
T_{HYS_OTSD}	Thermal shutdown hysteresis	Die temperature T_J		20		°C