JAJSCQ3E October   2016  – January 2021 DRV8702-Q1 , DRV8703-Q1

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 SPI Timing Requirements
    7. 6.7 Switching Characteristics
    8.     15
    9. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Bridge Control
        1. 7.3.1.1 Logic Tables
      2. 7.3.2  MODE Pin
      3. 7.3.3  nFAULT Pin
      4. 7.3.4  Current Regulation
      5. 7.3.5  Amplifier Output (SO)
        1. 7.3.5.1 SO Sample and Hold Operation
      6. 7.3.6  PWM Motor Gate Drivers
        1. 7.3.6.1 Miller Charge (QGD)
      7. 7.3.7  IDRIVE Pin (DRV8702-Q1 Only)
      8. 7.3.8  Dead Time
      9. 7.3.9  Propagation Delay
      10. 7.3.10 Overcurrent VDS Monitor
      11. 7.3.11 VDS Pin (DRV8702-Q1 Only)
      12. 7.3.12 Charge Pump
      13. 7.3.13 Gate Drive Clamp
      14. 7.3.14 Protection Circuits
        1. 7.3.14.1 VM Undervoltage Lockout (UVLO2)
        2. 7.3.14.2 Logic Undervoltage (UVLO1)
        3. 7.3.14.3 VCP Undervoltage Lockout (CPUV)
        4. 7.3.14.4 Overcurrent Protection (OCP)
        5. 7.3.14.5 Gate Driver Fault (GDF)
        6. 7.3.14.6 Thermal Shutdown (TSD)
        7. 7.3.14.7 Watchdog Fault (WDFLT, DRV8703-Q1 Only)
        8. 7.3.14.8 Reverse Supply Protection
      15. 7.3.15 Hardware Interface
        1. 7.3.15.1 IDRIVE (6-level input)
        2. 7.3.15.2 VDS (6-Level Input)
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
      1. 7.5.1 SPI Communication
        1. 7.5.1.1 Serial Peripheral Interface (SPI)
        2. 7.5.1.2 SPI Format
    6. 7.6 Register Maps
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 External FET Selection
        2. 8.2.2.2 IDRIVE Configuration
        3. 8.2.2.3 VDS Configuration
        4. 8.2.2.4 Current Chopping Configuration
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
    1. 9.1 Bulk Capacitance Sizing
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 用語集
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • RHB|32
サーマルパッド・メカニカル・データ
発注情報

Typical Characteristics

GUID-8BE427FD-6C63-4604-AD2F-A35152580FB1-low.gif
Figure 6-1 Supply Current vs Supply Voltage (VM)
GUID-01D66513-07FF-4240-99EB-334BC0C17749-low.gif
Figure 6-2 Supply Current vs Temperature
GUID-F85CE4D6-BD9B-4629-8E00-28D54E7DEA15-low.gif
Figure 6-3 Sleep Current vs Supply Voltage (VM)
GUID-C12EEC76-CCCB-4C52-B0B8-99DB50848B40-low.gif
2-mA load
Figure 6-5 DVDD Regulator
GUID-DA55A12F-36F2-497E-B20F-880B6B0C454E-low.gif
30-mA load
Figure 6-7 DVDD Regulator
GUID-EA1E755E-39DF-4166-8C1A-9119F68A4C2A-low.gif
10-V/V gain
Figure 6-9 Amplifier Gain
GUID-F56D36AB-256D-4B6C-AB81-90FA57104E14-low.gif
39.4-V/V gain
Figure 6-11 Amplifier Gain
GUID-720D92B1-3A10-4F7C-AE82-2360A56D8434-low.gif
VDS(OCP) = 0.06 V
Figure 6-13 OCP Threshold Voltage
GUID-29BA8F51-6FCE-483B-9667-DC09B6272FB6-low.gif
VDS(OCP) = 0.17 V
Figure 6-15 OCP Threshold Voltage
GUID-F29492C4-305F-40A4-AC52-74D4EBDF9858-low.gif
VDS(OCP) = 0.48 V
Figure 6-17 OCP Threshold Voltage
GUID-740A7D2F-52D8-4A97-9C78-DD35E94B637F-low.gif
VVM = 5.5 V
Figure 6-19 High-Side Source Current
GUID-E6ED49D8-C07E-4833-A1D7-965E878A3BC9-low.gif
VVM = 5.5 V
Figure 6-21 Low-Side Source Current
GUID-C75C53BB-8BCA-406A-90CF-7DF7842A0D04-low.gif
VVM = 13.5 V
Figure 6-23 High-Side Source Current
GUID-48194302-DA05-4615-82C0-C02B8AE75FE8-low.gif
VVM = 13.5 V
Figure 6-25 Low-Side Source Current
GUID-40E170D8-900F-445D-B0E5-C0D662FAE81A-low.gif
Figure 6-4 Sleep Current vs Temperature
GUID-102B2640-50C5-4A9D-B735-DBEA92063FEB-low.gif
2-mA load
Figure 6-6 AVDD Regulator
GUID-A5F63D91-8753-45ED-99ED-21A5513019B4-low.gif
30-mA load
Figure 6-8 AVDD Regulator
GUID-FD4BACDD-E77D-4D49-A354-4FC4B3A8DE23-low.gif
19.8-V/V gain
Figure 6-10 Amplifier Gain
GUID-FDE6ED58-D687-4621-8512-467AFB77092A-low.gif
78-V/V gain
Figure 6-12 Amplifier Gain
GUID-EFEC0959-0EC2-4433-83D7-79AE28D1EB68-low.gif
VDS(OCP) = 0.12 V
Figure 6-14 OCP Threshold Voltage
GUID-01B8FD36-E7E8-4D79-9194-8601074F2935-low.gif
VDS(OCP) = 0.24 V
Figure 6-16 OCP Threshold Voltage
GUID-5EB78825-81D1-4325-BC56-D2A4FA4F8896-low.gif
VDS(OCP) = 0.96 V
Figure 6-18 OCP Threshold Voltage
GUID-0C57CDE3-30FF-4A35-B4BC-5AF8814D3263-low.gif
VVM = 5.5 V
Figure 6-20 High-Side Sink Current
GUID-2E8C0F24-FFCE-4E6E-9418-5BB1DA5B5729-low.gif
VVM = 5.5 V
Figure 6-22 Low-Side Sink Current
GUID-A4681BEB-C6E2-4CEE-9833-95517254616B-low.gif
VVM = 13.5 V
Figure 6-24 High-Side Sink Current
GUID-571F300F-BA52-4091-A925-35C0CE0C6D2A-low.gif
VVM = 13.5 V
Figure 6-26 Low-Side Sink Current