JAJSD22B March 2017 – December 2018 DRV8702D-Q1 , DRV8703D-Q1
PRODUCTION DATA.
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A clamping structure limits the gate-drive output voltage to the VC(GS) voltage to protect the power FETs from damage. The positive voltage clamp is realized using a series of diodes. The negative voltage clamp uses the body diodes of the internal predriver FET.