SLVSC40H June   2013  – May 2020 DRV8711

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 SPI Timing Requirements
    7. 6.7 Indexer Timing Requirements
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  PWM Motor Drivers
      2. 7.3.2  Direct PWM Input Mode
      3. 7.3.3  Microstepping Indexer
      4. 7.3.4  Current Regulation
      5. 7.3.5  Decay Modes
      6. 7.3.6  Blanking Time
      7. 7.3.7  Predrivers
      8. 7.3.8  Configuring Predrivers
      9. 7.3.9  External FET Selection
      10. 7.3.10 Stall Detection
        1. 7.3.10.1 Internal Stall Detection
        2. 7.3.10.2 External Stall Detection
      11. 7.3.11 Protection Circuits
        1. 7.3.11.1 Overcurrent Protection (OCP)
        2. 7.3.11.2 Predriver Fault
        3. 7.3.11.3 Thermal Shutdown (TSD)
        4. 7.3.11.4 Undervoltage Lockout (UVLO)
    4. 7.4 Device Functional Modes
      1. 7.4.1 RESET and SLEEPn Operation
      2. 7.4.2 Microstepping Drive Current
    5. 7.5 Programming
      1. 7.5.1 Serial Data Format
    6. 7.6 Register Maps
      1. 7.6.1 Control Registers
      2. 7.6.2 CTRL Register (Address = 0x00)
      3. 7.6.3 TORQUE Register (Address = 0x01)
      4. 7.6.4 OFF Register (Address = 0x02)
      5. 7.6.5 BLANK Register (Address = 0x03)
      6. 7.6.6 DECAY Register (Address = 0x04)
      7. 7.6.7 STALL Register (Address = 0x05)
      8. 7.6.8 DRIVE Register (Address = 0x06)
      9. 7.6.9 STATUS Register (Address = 0x07)
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Sense Resistor
      2. 8.1.2 Optional Series Gate Resistor
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Set Step Rate
        2. 8.2.2.2 Calculate Current Regulation
        3. 8.2.2.3 Support External FETs
        4. 8.2.2.4 Pick Decay Mode
        5. 8.2.2.5 Config Stall Detection
        6. 8.2.2.6 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Bulk Capacitance
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3.3 Microstepping Indexer

Built-in indexer logic in the DRV8711 allows a number of different stepping configurations. The MODE bits in the CTRL register are used to configure the stepping format as shown in Table 3.

Table 3. Microstepping Indexer Logic

MODE3 MODE2 MODE1 MODE0 STEP MODE
0 0 0 0 Full-step (2-phase excitation) with 71% current
0 0 0 1 1/2 step
0 0 1 0 1/4 step
0 0 1 1 1/8 step
0 1 0 0 1/16 step
0 1 0 1 1/32 step
0 1 1 0 1/64 step
0 1 1 1 1/128 step
1 0 0 0 1/256 step

Table 4 shows the relative current and step directions for full-step through 1/8-step operation. Higher microstepping resolutions follow the same pattern. The AOUT current is the sine of the electrical angle; BOUT current is the cosine of the electrical angle.

The reset state is 45°. This state is entered at power up or application of RESETn. This is shown in Table 4 by cells shaded in yellow.

Table 4. Step Directions

FULL STEP 1/2 STEP 1/4 STEP 1/8 STEP AOUT CURRENT
(% FULL-SCALE)		 BOUT CURRENT
(% FULL-SCALE)		 ELECTRICAL ANGLE
(DEGREES)
1 1 1 0 100 0
2 20 98 11.325
2 3 38 92 22.5
4 56 83 33.75
1 2 3 5 71 71 45 (home state)
6 83 56 56.25
4 7 92 38 67.5
8 98 20 78.75
3 5 9 100 0 90
10 98 –20 101.25
6 11 92 –38 112.5
12 83 –56 123.75
2 4 7 13 71 –71 135
14 56 –83 146.25
8 15 38 –92 157.5
16 20 –98 168.75
5 9 17 0 –100 180
18 –20 –98 191.25
10 19 –38 –92 202.5
20 –56 –83 213.75
3 6 11 21 –71 –71 225
22 –83 –56 236.25
12 23 –92 –38 247.5
24 –98 –20 258.75
7 13 25 –100 0 270
26 –98 20 281.25
14 27 –92 38 292.5
28 –83 56 303.75
4 8 15 29 –71 71 315
30 –56 83 326.25
16 31 –38 92 337.5
32 –20 98 348.75

At each rising edge of the STEP input, or each time a 1 is written to the RSTEP bit in the CTRL register, the indexer travels to the next state in the table. The direction is shown with the DIR pin high and the RDIR bit in the CTRL register set to 0, or the DIR pin low and the RDIR bit set to 1. If the DIR pin is low with the RDIR bit 0, or the DIR pin is high with the RDIR bit 1, the sequence is reversed. Positive current is defined as xOUT1 = positive with respect to xOUT2.

If the step mode is changed while stepping, the indexer will advance to the next valid state for the new MODE setting at the rising edge of STEP.