The DRV8812 provides an integrated motor driver solution for printers, scanners, and other automated equipment applications. The device has two H-bridge drivers, and can drive a bipolar stepper motor or two DC motors. The output driver block for each consists of N-channel power MOSFET’s configured as full H-bridges to drive the motor windings. The DRV8812 is capable of driving up to 1.6-A of output current (with proper heatsinking, at 24 V and 25°C).
A simple parallel digital control interface is compatible with industry-standard devices. Decay mode is programmable.
Internal shutdown functions are provided for over current protection, short circuit protection, under voltage lockout and overtemperature.
The DRV8812 is available in a 28-pin HTSSOP package with PowerPAD™ and in a 28-pin QFN package PowerPAD™ (Eco-friendly: RoHS & no Sb/Br).
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
DRV8812 | HTSSOP (28) | 9.70 mm x 4.40 mm |
VQFN (28) | 5.00 mm x 5.00 mm |
Changes from F Revision (August 2013) to G Revision
PIN | I/O(1) | DESCRIPTION | EXTERNAL COMPONENTS OR CONNECTIONS |
||
---|---|---|---|---|---|
NAME | PWP | RHD | |||
POWER AND GROUND | |||||
GND | 14, 28 | 3, 17 | - | Device ground | |
VMA | 4 | 7 | - | Bridge A power supply | Connect to motor supply (8.2-V to 45-V). Both pins must be connected to the same supply, bypassed with a 0.1uF capacitor to GND, and connected to appropriate bulk capacitance. |
VMB | 11 | 14 | - | Bridge B power supply | |
V3P3OUT | 15 | 18 | O | 3.3-V regulator output | Bypass to GND with a 0.47-μF 6.3-V ceramic capacitor. Can be used to supply VREF. |
CP1 | 1 | 4 | IO | Charge pump flying capacitor | Connect a 0.01-μF 50-V capacitor between CP1 and CP2. |
CP2 | 2 | 5 | IO | Charge pump flying capacitor | |
VCP | 3 | 6 | IO | High-side gate drive voltage | Connect a 0.1-μF 16-V ceramic capacitor and a 1-MΩ resistor to VM. |
CONTROL | |||||
AENBL | 21 | 24 | I | Bridge A enable | Logic high to enable bridge A |
APHASE | 20 | 23 | I | Bridge A phase (direction) | Logic high sets AOUT1 high, AOUT2 low |
AI0 | 24 | 27 | I | Bridge A current set | Sets bridge A current: 00 = 100%, 01 = 71%, 10 = 38%, 11 = 0 |
AI1 | 25 | 28 | I | ||
BENBL | 22 | 25 | I | Bridge B enable | Logic high to enable bridge B |
BPHASE | 23 | 26 | I | Bridge B phase (direction) | Logic high sets BOUT1 high, BOUT2 low |
BI0 | 26 | 1 | I | Bridge B current set | Sets bridge B current: 00 = 100%, 01 = 71%, 10 = 38%, 11 = 0 |
BI1 | 27 | 2 | I | ||
DECAY | 19 | 22 | I | Decay mode | Low = slow decay, open = mixed decay, high = fast decay |
nRESET | 16 | 19 | I | Reset input | Active-low reset input initializes internal logic and disables the H-bridge outputs |
nSLEEP | 17 | 20 | I | Sleep mode input | Logic high to enable device, logic low to enter low-power sleep mode |
AVREF | 12 | 15 | I | Bridge A current set reference input | Reference voltage for winding current set. Can be driven individually with an external DAC for microstepping, or tied to a reference (e.g., V3P3OUT). A 0.01-µF bypass capacitor to GND is recommended. |
BVREF | 13 | 16 | I | Bridge B current set reference input | |
STATUS | |||||
nFAULT | 18 | 21 | OD | Fault | Logic low when in fault condition (overtemp, overcurrent) |
OUTPUT | |||||
ISENA | 6 | 9 | IO | Bridge A ground / Isense | Connect to current sense resistor for bridge A |
ISENB | 9 | 12 | IO | Bridge B ground / Isense | Connect to current sense resistor for bridge B |
AOUT1 | 5 | 8 | O | Bridge A output 1 | Connect to motor winding A |
AOUT2 | 7 | 10 | O | Bridge A output 2 | |
BOUT1 | 10 | 13 | O | Bridge B output 1 | Connect to motor winding B |
BOUT2 | 8 | 11 | O | Bridge B output 2 |