SLVSBH2C June   2012  – December 2015 DRV8823-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Dissipation Ratings
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 PWM Motor Drivers
      2. 7.3.2 Protection Circuits
        1. 7.3.2.1 Overcurrent Protection (OCP)
        2. 7.3.2.2 Thermal Shutdown (TSD)
        3. 7.3.2.3 Undervoltage Lockout (UVLO)
        4. 7.3.2.4 Shoot-Through Current Prevention
    4. 7.4 Device Functional Modes
      1. 7.4.1 Bridge Control
      2. 7.4.2 Current Regulation
      3. 7.4.3 Decay Mode
      4. 7.4.4 Blanking Time
    5. 7.5 ProgrammingData Format to Programming
      1. 7.5.1 Serial Data Transmission
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Motor Voltage
        2. 8.2.2.2 Drive Current
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
      1. 10.3.1 Power Dissipation
      2. 10.3.2 Heatsinking
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

DCA Package
48-Pin HTSSOP
Top View
DRV8823-Q1 po_lvs913.gif

Pin Functions

PIN I/O(1) DESCRIPTION EXTERNAL COMPONENTS OR CONNECTIONS
NAME NO.
POWER AND GROUND
VM
1, 2,
23, 24		 – Motor supply voltage (multiple pins) Connect all VM pins together to motor supply voltage.
Bypass to GND with several 0.1-μF, 35-V ceramic capacitors.
V3P3 16 – 3.3 V regulator output Bypass to GND with 0.47-μF, 6.3-V ceramic capacitor.
GND 10–15,
34–39		 – Power ground (multiple pins) Connect all PGND pins to GND and solder to copper heatsink areas.
CP1 7 IO Charge pump flying capacitor Connect a 0.01-μF capacitor between CP1 and CP2.
CP2 8 IO
VCP 9 IO Charge pump storage capacitor Connect a 0.1-μF, 16 V ceramic capacitor to VM.
MOTOR DRIVERS
ABVREF 17 I Bridge A & B current set reference voltage Sets current trip threshold
AOUT1 5 O Bridge A output 1 Connect to first coil of bipolar stepper motor 1, or DC motor winding.
AOUT2 3 O Bridge A output 2
ISENA 4 – Bridge A current sense Connect to current sense resistor for bridge A.
BOUT1 48 O Bridge B output 1 Connect to second coil of bipolar stepper motor 1, or DC motor winding.
BOUT2 46 O Bridge B output 2
ISENB 47 – Bridge B current sense Connect to current sense resistor for bridge B.
CDVREF 18 I Bridge C & D current set reference voltage Sets current trip threshold
COUT1 27 O Bridge C output 1 Connect to first coil of bipolar stepper motor 2, or DC motor winding.
COUT2 25 O Bridge C output 2
ISENC 26 – Bridge C current sense Connect to current sense resistor for bridge C.
DOUT1 22 O Bridge D output 1 Connect to second coil of bipolar stepper motor 2, or DC motor winding.
DOUT2 20 O Bridge D output 2
ISEND 22 – Bridge D current sense Connect to current sense resistor for bridge D.
SERIAL INTERFACE
SDATA 31 I Serial data input Data is clocked in on rising edge of SCLK.
SCLK 33 I Serial input clock Logic high enables serial data to be clocked in.
SCS 45 I Serial chip select Logic high latches serial data.
SSTB 30 I Serial data strobe Active low resets serial interface and disables outputs.
RESETn 43 I Reset input Active low input disables outputs and charge pump.
SLEEPn 42 I Sleep input
TEST PINS
TEST 19, 28,
29, 32		 I Test inputs Do not connect these pins - used for factory test only.
(1) Directions: I = input, O = output, OZ = 3-state output, OD = open-drain output, IO = input/output, PU = internal pullup
DRV8823-Q1 logic_in_lvs913.gif Figure 1. Logic Inputs