8.3.1 PWM Motor Drivers

The DRV8842-EP contains one H-bridge motor driver with current-control PWM circuitry. Figure 4 shows a block diagram of the motor control circuitry.

Figure 4. Motor Control Circuitry

Note that there are multiple VM, ISEN, OUT, and VREF pins. All like-named pins must be connected together on the PCB.

8.3.2 Bridge Control

The IN1 and IN2 input pins directly control the state of the OUT1 and OUT2 outputs. Either input can also be used for PWM control of the load. Table 1 shows the logic.

The control inputs have internal pulldown resistors of approximately 100 kΩ.

8.3.3 Current Regulation

The maximum current through the load is regulated by a fixed-frequency PWM current regulation, or current chopping. When the H-bridge is enabled, current rises through the winding at a rate dependent on the DC voltage and inductance of the winding. After the current hits the current chopping threshold, the bridge disables the current until the beginning of the next PWM cycle.

For DC motors, current regulation is used to limit the start-up and stall current of the motor. Speed control is typically performed by providing an external PWM signal to the IN1 or IN2 input pins.

If the current regulation feature is not needed, it can be disabled by connecting the ISEN pins directly to ground and the VREF pins to V3P3.

The PWM chopping current is set by a comparator which compares the voltage across a current sense resistor connected to the ISEN pins, multiplied by a factor of 5, with a reference voltage. The reference voltage is input from the VREF pins, and is scaled by a 5-bit DAC that allows current settings of 0% to 100% in an approximately sinusoidal sequence.

The full-scale (100%) chopping current is calculated in Equation 1.

Equation 1.

Example:

If using a 0.25-Ω sense resistor and the VREF pins are 2.5 V, the full-scale (100%) chopping current is 2.5 V / (5 × 0.25 Ω) = 2 A.

Five input pins (I0 through I4) are used to scale the current in the bridge as a percentage of the full-scale current set by the VREF input pin and sense resistance. The I0 through I4 pins have internal pulldown resistors of approximately 100 kΩ. The function of the pins is shown in Table 2.

8.3.4 Blanking Time

After the current is enabled in an H-bridge, the voltage on the ISEN pin is ignored for a fixed period of time before enabling the current sense circuitry. This blanking time is fixed at 3.75 μs. Note that the blanking time also sets the minimum on-time of the PWM.

8.3.5 nRESET and nSLEEP Operation

The nRESET pin, when driven active low, resets the internal logic. It also disables the H-bridge driver. All inputs are ignored while nRESET is active.

Driving nSLEEP low puts the device into a low-power sleep state. In this state, the H-bridges are disabled, the gate drive charge pump is stopped, the V3P3OUT regulator is disabled, and all internal clocks are stopped. In this state, all inputs are ignored until nSLEEP returns inactive high. When returning from sleep mode, some time (approximately 1 ms) needs to pass before the motor driver becomes fully operational. Note that nRESET and nSLEEP have internal pulldown resistors of approximately 100 kΩ. These signals need to be driven to logic high for device operation.

8.3.6 Protection Circuits

The DRV8842-EP is fully protected against undervoltage, overcurrent, and overtemperature events.

8.3.7 Thermal Protection

The DRV8842-EP has TSD as described in Thermal Shutdown (TSD). If the die temperature exceeds approximately 150°C, the device is disabled until the temperature drops to a safe level.

Any tendency of the device to enter TSD is an indication of either excessive power dissipation, insufficient heatsinking, or too high an ambient temperature.

8.3.8 Heatsinking

The PowerPAD™ package uses an exposed pad to remove heat from the device. For proper operation, this pad must be thermally connected to copper on the PCB to dissipate heat. On a multi-layer PCB with a ground plane, this can be accomplished by adding a number of vias to connect the thermal pad to the ground plane. On PCBs without internal planes, copper area can be added on either side of the PCB to dissipate heat. If the copper area is on the opposite side of the PCB from the device, thermal vias are used to transfer the heat between top and bottom layers.

For details about how to design the PCB, refer to TI application report SLMA002, PowerPAD™ Thermally Enhanced Package and TI application brief SLMA004, PowerPAD™ Made Easy, available at www.ti.com.

In general, the more copper area that can be provided, the more power can be dissipated.

8.4.1 Decay Mode

During PWM current chopping, the H-bridge is enabled to drive current through the motor winding until it reaches the PWM current chopping threshold (see Figure 5, case 1). The current flow direction shown indicates the state when the IN1 pin is high and the IN2 pin is low.

After the chopping current threshold is reached, the H-bridge can operate in two different states, fast decay or slow decay.

In fast decay mode, after the PWM chopping current level is reached, the H-bridge reverses state to allow winding current to flow in a reverse direction. As the winding current approaches 0, the bridge is disabled to prevent any reverse current flow. Figure 5 case 2 shows fast decay mode.

In slow decay mode, winding current is recirculated by enabling both of the low-side FETs in the bridge (see Figure 5, case 3).

Figure 5. Decay Mode

The DRV8842-EP supports fast decay, slow decay, and a mixed decay mode. Slow, fast, or mixed decay mode is selected by the state of the DECAY pin. Logic low selects slow decay. Open selects mixed decay operation. And, logic high sets fast decay mode. The DECAY pin has both an internal pullup resistor of approximately 130 kΩ and an internal pulldown resistor of approximately 80 kΩ. This sets the mixed decay mode if the pin is left open or undriven.

Mixed decay mode begins as fast decay, but at a fixed period of time (75% of the PWM cycle) switches to slow decay mode for the remainder of the fixed PWM period.