JAJSM96 データシート

JAJSM96 may 2023 DRV8849

PRODUCTION DATA

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

RHH|36
- MPQF144E

サーマルパッド・メカニカル・データ

発注情報

jajsm96_oa

7.5 Electrical Characteristics

Typical values are at T_A = 25°C and V_VM = 24 V. All limits are over recommended operating conditions, unless otherwise noted.

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
POWER SUPPLIES (VM)
I_VM	VM operating supply current	ENABLE = 1, nSLEEP = 1, No motor load		6	8	mA
		nSLEEP = 1, Outputs off		5.5	7	mA
		nSLEEP = 0		1.3	3	μA
t_SLEEP	Sleep time	nSLEEP = 0 to sleep mode	120			μs
t_RESET	nSLEEP reset pulse	nSLEEP low to clear fault	20		40	μs
t_ON	Turn-on time	VM > UVLO to output transition		0.62	0.8	ms
t_WAKE	Wake-up time	nSLEEP = 1 to output transition		0.62	0.8	ms
t_EN	Enable time	ENABLE = 0/1 to output transition			1	μs
CHARGE PUMP (VCP, CP1, CP2)
V_VCP	VCP operating voltage	6 V < V_VM < 38 V		V_VM + 5		V
f_(VCP)	Charge pump switching frequency	V_VM > UVLO, nSLEEP = 1		380		kHz
LOGIC-LEVEL INPUTS (STEP, DIR, nSLEEP)
V_IL	Input logic-low voltage		0		0.8	V
V_IH	Input logic-high voltage		2		5.5	V
V_HYS	Input logic hysteresis		150	300	500	mV
I_INL	Logic input low current	V_IN = 0 V	-1		1	μA
I_INH	Logic input high current	V_IN = 5 V			30	μA
TRI-LEVEL INPUTS (MODE0x, ENABLE)
V_I1	Input logic-low voltage	Tied to GND	0		0.6	V
V_I2	Input Hi-Z voltage	Hi-Z	1.8	2	2.2	V
V_I3	Input logic-high voltage	Tied to 5 V	2.7		5.5	V
I_O	Input pull-up current			10		μA
QUAD-LEVEL INPUTS (MODE1x, DECAYx)
V_I1	Input logic-low voltage	Tied to GND	0		0.6	V
V_I2		330kΩ ± 5% to GND	1	1.25	1.4	V
V_I3	Input Hi-Z voltage	Hi-Z	1.8	2	2.2	V
V_I4	Input logic-high voltage	Tied to 5 V	2.7		5.5	V
I_O	Input pull-up current			10		μA
CONTROL OUTPUTS (nFAULTx)
V_OL	Output logic-low voltage	I_O = 5 mA			0.2	V
I_OH	Output logic-high leakage	VMx = 24 V	-1		1	μA
MOTOR DRIVER OUTPUTS
R_DS(ONH)	High-side FET on resistance	T_J = 25 °C, I_O = -1.2 A		450	550	mΩ
		T_J = 125 °C, I_O = -1.2 A		700	850	mΩ
		T_J = 150 °C, I_O = -1.2 A		780	950	mΩ
R_DS(ONL)	Low-side FET on resistance	T_J = 25 °C, I_O = 1.2 A		450	550	mΩ
		T_J = 125 °C, I_O = 1.2 A		700	850	mΩ
		T_J = 150 °C, I_O = 1.2 A		780	950	mΩ
V_f, Outputs		I_O = ± 1.2 A			1.2	V
I_DSS	Output Leakage	Outputs, V_OUT = 0 to VM	-2		7	μA
t_SR	Output rise/fall time	VM = 24V, I_O = 1.2 A, Between 10% and 90%		100		ns
t_D	Dead time			425		ns
t_BLANK	Current sense blanking time ^(⁽¹⁾)			1		μs
PWM CURRENT CONTROL (VREFx)
K_V	Transimpedance gain	VREF = 3.3 V	2.09	2.2	2.31	V/A
I_VREFx	VREFx pin reference input Current		-1		1	μA
t_OFF	PWM off-time	DECAYx = 1		16		μs
		DECAYx = Hi-Z		32
		DECAYx = 330 kΩ to GND		8
I_O,CH	AOUT and BOUT current matching	I_O = 1.5 A	-2.5		2.5	%
ΔI_TRIP	Current trip accuracy	I_O = 1.5 A, 68% to 100% current setting	–5		5	%
		I_O = 1.5 A, 20% to 67% current setting	–10		10
		I_O = 1.5 A, 10% to 20% current setting	-15		15
PROTECTION CIRCUITS
VM_UVLO	VM UVLO threshold	VM falling	4.1	4.25	4.35	V
VM_UVLO	VM UVLO threshold	VM rising	4.2	4.34	4.45	V
VM_UVLO,HYS	VM UVLO hysteresis	Rising to falling threshold		90		mV
V_CPUV	Charge pump undervoltage	VCP falling		V_VM + 2		V
I_OCP	Overcurrent protection	Current through any FET	2.5			A
t_OCP	Overcurrent deglitch time			2.1		μs
t_RETRY	Overcurrent retry time			4		ms
T_OTSD	Thermal shutdown	Die temperature T_J	155	165	175	°C
T_{HYS_OTSD}	Thermal shutdown hysteresis	Die temperature T_J		20		°CGuaranteed by design.

(1)

Guaranteed by design.