JAJSD17B August   2015  – July 2016 DRV8871

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Bridge Control
      2. 7.3.2 Sleep Mode
      3. 7.3.3 Current Regulation
      4. 7.3.4 Dead Time
      5. 7.3.5 Protection Circuits
        1. 7.3.5.1 VM Undervoltage Lockout (UVLO)
        2. 7.3.5.2 Overcurrent Protection (OCP)
        3. 7.3.5.3 Thermal Shutdown (TSD)
    4. 7.4 Device Functional Modes
      1. 7.4.1 PWM With Current Regulation
      2. 7.4.2 PWM Without Current Regulation
      3. 7.4.3 Static Inputs With Current Regulation
      4. 7.4.4 VM Control
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Motor Voltage
        2. 8.2.2.2 Drive Current
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Bulk Capacitance
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
    4. 10.4 Power Dissipation
      1. 10.4.1 Heatsinking
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントのサポート
      1. 11.1.1 関連資料
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Power supply voltage (VM) –0.3 50 V
Logic input voltage (IN1, IN2) –0.3 7 V
Continuous phase node pin voltage (OUT1, OUT2) –0.7 VM + 0.7 V
Output current (100% duty cycle) 0 3.5 A
Operating junction temperature, TJ –40 150 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±6000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±750
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VM Power supply voltage 6.5 45 V
VI Logic input voltage (IN1, IN2) 0 5.5 V
fPWM Logic input PWM frequency (IN1, IN2) 0 200(2) kHz
Ipeak Peak output current(1) 0 3.6 A
TA Operating ambient temperature(1) –40 125 °C
(1) Power dissipation and thermal limits must be observed
(2) The voltages applied to the inputs should have at least 800 ns of pulse width to ensure detection. Typical devices require at least 400 ns. If the PWM frequency is 200 kHz, the usable duty cycle range is 16% to 84%.

6.4 Thermal Information

THERMAL METRIC(1) DRV8871 UNIT
DDA (HSOP)
8 PINS
RθJA Junction-to-ambient thermal resistance 41.1 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 53.1 °C/W
RθJB Junction-to-board thermal resistance 23.1 °C/W
ψJT Junction-to-top characterization parameter 8.2 °C/W
ψJB Junction-to-board characterization parameter 23 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 2.7 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report (SPRA953).

6.5 Electrical Characteristics

TA = 25°C, over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER SUPPLY (VM)
VM VM operating voltage 6.5 45 V
IVM VM operating supply current VM = 12 V 3 10 mA
IVMSLEEP VM sleep current VM = 12 V 10 µA
tON(1) Turn-on time VM > VUVLO with IN1 or IN2 high 40 50 µs
LOGIC-LEVEL INPUTS (IN1, IN2)
VIL Input logic low voltage 0.5 V
VIH Input logic high voltage 1.5 V
VHYS Input logic hysteresis 0.5 V
IIL Input logic low current VIN = 0 V –1 1 μA
IIH Input logic high current VIN = 3.3 V 33 100 μA
RPD Pulldown resistance To GND 100 kΩ
tPD Propagation delay INx to OUTx change (see Figure 6) 0.7 1 μs
tsleep Time to sleep Inputs low to sleep 1 1.5 ms
MOTOR DRIVER OUTPUTS (OUT1, OUT2)
RDS(ON) High-side FET on resistance VM = 24 V, I = 1 A, fPWM = 25 kHz 307 360 mΩ
RDS(ON) Low-side FET on resistance VM = 24 V, I = 1 A, fPWM = 25 kHz 258 320 mΩ
tDEAD Output dead time 220 ns
Vd Body diode forward voltage IOUT = 1 A 0.8 1 V
CURRENT REGULATION
VILIM Constant for calculating current regulation (see Equation 1) IOUT = 1 A 59 64 69 kV
tOFF PWM off-time 25 µs
tBLANK PWM blanking time 2 µs
PROTECTION CIRCUITS
VUVLO VM undervoltage lockout VM falls until UVLO triggers 6.1 6.4 V
VM rises until operation recovers 6.3 6.5
VUV,HYS VM undervoltage hysteresis Rising to falling threshold 100 180 mV
IOCP Overcurrent protection trip level 3.7 4.5 6.4 A
tOCP Overcurrent deglitch time 1.5 μs
tRETRY Overcurrent retry time 3 ms
TSD Thermal shutdown temperature 150 175 °C
THYS Thermal shutdown hysteresis 40 °C
(1) tON applies when the device initially powers up, and when it exits sleep mode.

6.6 Typical Characteristics

DRV8871 D001_SLVSCY8.gif
Figure 1. RDS(on) vs Temperature
DRV8871 D004_SLVSCY8.gif
Figure 3. IVMSLEEP vs VM at 25°C
DRV8871 D003_SLVSCY9.gif
Figure 2. VILIM vs Temperature