JAJSD17B August   2015  – July 2016 DRV8871

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
  4. 改訂履歴
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Bridge Control
      2. 7.3.2 Sleep Mode
      3. 7.3.3 Current Regulation
      4. 7.3.4 Dead Time
      5. 7.3.5 Protection Circuits
        1. 7.3.5.1 VM Undervoltage Lockout (UVLO)
        2. 7.3.5.2 Overcurrent Protection (OCP)
        3. 7.3.5.3 Thermal Shutdown (TSD)
    4. 7.4 Device Functional Modes
      1. 7.4.1 PWM With Current Regulation
      2. 7.4.2 PWM Without Current Regulation
      3. 7.4.3 Static Inputs With Current Regulation
      4. 7.4.4 VM Control
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Motor Voltage
        2. 8.2.2.2 Drive Current
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
    1. 9.1 Bulk Capacitance
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
    4. 10.4 Power Dissipation
      1. 10.4.1 Heatsinking
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントのサポート
      1. 11.1.1 関連資料
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

Application Information

The DRV8871 device is typically used to drive one brushed DC motor.

Typical Application

DRV8871 typ_app_lvscy9.gif Figure 7. Typical Connections

Design Requirements

Table 3 lists the design parameters.

Table 3. Design Parameters

DESIGN PARAMETER REFERENCE EXAMPLE VALUE
Motor voltage VM 24 V
Motor RMS current IRMS 0.8 A
Motor startup current ISTART 2 A
Motor current trip point ITRIP 2.1 A
ILIM resistance RILIM 30 kΩ
PWM frequency fPWM 5 kHz

Detailed Design Procedure

Motor Voltage

The motor voltage to use will depend on the ratings of the motor selected and the desired RPM. A higher voltage spins a brushed DC motor faster with the same PWM duty cycle applied to the power FETs. A higher voltage also increases the rate of current change through the inductive motor windings.

Drive Current

The current path is through the high-side sourcing DMOS power driver, motor winding, and low-side sinking DMOS power driver. Power dissipation losses in one source and sink DMOS power driver are shown in the following equation.

Equation 2. DRV8871 eq_Pd_SLVSCY8.gif

The DRV8871 device has been measured to be capable of 2-A RMS current at 25°C on standard FR-4 PCBs. The max RMS current varies based on the PCB design, ambient temperature, and PWM frequency. Typically, switching the inputs at 200 kHz compared to 20 kHz causes 20% more power loss in heat.

Application Curves

DRV8871 app_current_ramp_VM_12V_slvscy8.png Figure 8. Current Ramp With a 2-Ω, 1 mH,
RL Load and VM = 12 V
DRV8871 app_current_ramp_VM_45V_slvscy8.png Figure 10. Current Ramp With a 2-Ω, 1 mH,
RL Load and VM = 45 V
DRV8871 app_current_reg_slvscy9.png Figure 12. Current Regulation With RILIM = 50.5 kΩ
DRV8871 app_current_ramp_VM_24V_slvscy8.png Figure 9. Current Ramp With a 2-Ω, 1 mH,
RL Load and VM = 24 V
DRV8871 app_tPD_slvscy8.png Figure 11. tPD
DRV8871 app_OCP_slvscy9.png Figure 13. OCP With 45 V and the Outputs Shorted Together