JAJSFZ9B October 2017 – January 2021 DRV8873-Q1
PRODUCTION DATA
In this mode, no protective action is performed when an overcurrent event occurs. The overcurrent event is reported by driving the nFAULT pin low and latching the FAULT, OCP, and corresponding MOSFET OCP bits high in the SPI registers. The motor driver continues to operate. The external controller acts appropriately to manage the overcurrent condition. The reporting is cleared (nFAULT released) when the OCP condition is removed and a clear faults command has been issued either through the CLR_FLT bit or an nSLEEP reset pulse.