JAJSPT0 February   2023 DS160PR1601

PRODUCTION DATA  

1. 1 特長
2. 2 アプリケーション
3. 3 概要
4. 4 Revision History
5. 5 Pin Configuration and Functions
6. 6 Specifications
   1. 6.1 Absolute Maximum Ratings
   2. 6.2 ESD and Latchup Ratings
   3. 6.3 Recommended Operating Conditions
   4. 6.4 Thermal Information
   5. 6.5 DC Electrical Characteristics
   6. 6.6 High Speed Electrical Characteristics
   7. 6.7 SMBUS/I2C Timing Charateristics
   8. 6.8 Typical Characteristics
   9. 6.9 Typical Jitter Characteristics
7. 7 Detailed Description
   1. 7.1 Overview
   2. 7.2 Functional Block Diagram
   3. 7.3 Control and Configuration Interface
      1. 7.3.1 Pin Configurations for Lanes
         1. 7.3.1.1 Five-Level Control Inputs
      2. 7.3.2 SMBUS/I2C Register Control Interface
      3. 7.3.3 SMBus/I 2 C Primary Mode Configuration (EEPROM Self Load)
   4. 7.4 Feature Description
      1. 7.4.1 Linear Equalization
      2. 7.4.2 Flat-Gain
      3. 7.4.3 Analog EyeScan
      4. 7.4.4 Receiver Detect State Machine
      5. 7.4.5 Integrated Capacitors
   5. 7.5 Device Functional Modes
      1. 7.5.1 Active PCIe Mode
      2. 7.5.2 Active Buffer Mode
      3. 7.5.3 Standby Mode
8. 8 Application and Implementation
   1. 8.1 Application Information
   2. 8.2 Typical Applications
      1. 8.2.1 PCIe x16 Lane Configuration
         1. 8.2.1.1 Design Requirements
         2. 8.2.1.2 Detailed Design Procedure
         3. 8.2.1.3 Application Curves
   3. 8.3 Power Supply Recommendations
   4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
9. 9 Device and Documentation Support
   1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
   2. 9.2 ドキュメントの更新通知を受け取る方法
   3. 9.3 サポート・リソース
   4. 9.4 Trademarks
   5. 9.5 静電気放電に関する注意事項
   6. 9.6 用語集
10. 10Mechanical, Packaging, and Orderable Information