SNLS334G
April 2011 – January 2015
DS80PCI800
PRODUCTION DATA.
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Ratings
6.4
Electrical Characteristics
6.5
Electrical Characteristics — Serial Management Bus Interface
6.6
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
4-Level Input Configuration Guidelines
8.4
Device Functional Modes
8.4.1
Pin Control Mode
8.4.2
SMBUS Mode
8.5
Programming
8.5.1
System Management Bus (SMBus) and Configuration Registers
8.5.2
Transfer of Data Through the SMBus
8.5.3
Writing a Register
8.5.4
Reading a Register
8.5.5
SMBus Master Mode
8.6
Register Maps
9
Application and Implementation
9.1
Application Information
9.1.1
DS80PCI800 versus DS80PCI810
9.1.2
Signal Integrity in PCIe Applications
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
10
Power Supply Recommendations
10.1
3.3-V or 2.5-V Supply Mode Operation
10.2
Power Supply Bypassing
11
Layout
11.1
Layout Guidelines
11.1.1
PCB Layout Considerations for Differential Pairs
11.2
Layout Example
12
Device and Documentation Support
12.1
Device Support
12.1.1
Third-Party Products Disclaimer
12.2
Trademarks
12.3
Electrostatic Discharge Caution
12.4
Glossary
13
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
NJY|54
MPQS027A
サーマルパッド・メカニカル・データ
7 Parameter Measurement Information
Figure 4. CML Output and Rise and Fall Transition Time
Figure 5. Propagation Delay Timing Diagram
Figure 6. Transmit IDLE-DATA and DATA-IDLE Response Time
Figure 7. SMBus Timing Parameters