JAJSGU8B September   2005  – January 2019 DS90LV049H

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      デュアル・インライン
      2.      機能図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 DS90LV049H LVDS Driver and Receiver Functionality
      2. 8.3.2 Termination
      3. 8.3.3 Fail-Safe Feature
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Power Decoupling Recommendations
        2. 9.2.2.2 PCB Transmission Lines
        3. 9.2.2.3 Input Fail-Safe Biasing
        4. 9.2.2.4 Probing LVDS Transmission Lines on PCB
        5. 9.2.2.5 Interconnecting Media
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Microstrip vs. Stripline Topologies
      2. 11.1.2 Dielectric Type and Board Construction
      3. 11.1.3 Recommended Stack Layout
      4. 11.1.4 Separation Between Traces
      5. 11.1.5 Crosstalk and Ground Bounce Minimization
      6. 11.1.6 Decoupling
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 関連資料
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.5 Electrical Characteristics

Over supply voltage and operating temperature ranges, unless otherwise specified.(1)(2)(3)
PARAMETER TEST CONDITIONS PIN MIN TYP MAX UNIT
LVCMOS Input DC Specifications (Driver Inputs, ENABLE Pins)
VIH Input High Voltage DIN
EN
EN 		2 VDD V
VIL Input Low Voltage GND 0.8 V
IIH Input High Current VIN = VDD −10 1 +10 μA
IIL Input Low Current VIN = GND −10 −0.1 +10 μA
VCL Input Clamp Voltage ICL = −18 mA −1.5 −0.6 V
LVDS Output DC Specifications (Driver Outputs)
| VOD | Differential Output Voltage RL = 100 Ω
(Figure 2)		 DOUT− DOUT+ 250 350 450 mV
ΔVOD Change in Magnitude of VOD for Complementary Output States 1 35 |mV|
VOS Offset Voltage 1.125 1.23 1.375 V
ΔVOS Change in Magnitude of VOS for Complementary Output States 1 25 |mV|
IOS Output Short-Circuit Current(4) ENABLED,
DIN = VDD, DOUT+ = 0 V or
DIN = GND, DOUT− = 0 V		 −5.8 −9 mA
IOSD Differential Output Short-Circuit Current(4) ENABLED, VOD = 0 V −5.8 −9 mA
IOFF Power-off Leakage VOUT = 0 V or 3.6 V
VDD = 0 V or Open 		−20 ±1 +20 μA
IOZ Output TRI-STATE Current EN = 0 V and EN = VDD
VOUT = 0 V or VDD 		−10 ±1 +10 μA
LVDS Input DC Specifications (Receiver Inputs)
VTH Differential Input High Threshold VCM = 1.2 V, 0.05 V, 2.35 V RIN+ RIN- −15 35 mV
VTL Differential Input Low Threshold –100 −15 mV
VCMR Common-Mode Voltage Range VID = 100 mV, VDD=3.3 V 0.05 3 V
IIN Input Current VDD=3.6 V
VIN =0 V or 2.8 V		 −12 ±4 +12 μA
VDD=0 V
VIN =0 V or 2.8 V or 3.6 V		 −10 ±1 +10 μA
LVCMOS Output DC Specifications (Receiver Outputs)
VOH Output High Voltage IOH = -0.4 mA, VID= 200 mV ROUT 2.7 3.3 V
VOL Output Low Voltage IOL = 2 mA, VID = 200 mV 0.05 0.25 V
IOZ Output TRI-STATE Current Disabled, VOUT =0 V or VDD –10 ±1 +10 μA
General DC Specifications
IDD Power Supply Current(5) EN = 3.3 V VDD 21 35 mA
IDDZ TRI-State Supply Current EN = 0 V 15 25 mA
(1) Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except: VTH, VTL, VOD and ΔVOD.
(2) All typical values are given for: VDD = +3.3 V, TA = +25°C.
(3) The DS90LV049H's drivers are current mode devices and only function within datasheet specifications when a resistive load is applied to their outputs. The typical range of the resistor values is 90 Ω to 110 Ω.
(4) Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only.
(5) Both driver and receiver inputs are static. All LVDS outputs have 100 Ω load. All LVCMOS outputs are floating. None of the outputs have any lumped capacitive load.