JAJSMU1 February 2023 DS90UB638-Q1
PRODUCTION DATA
BIT | FIELD | TYPE | DEFAULT | DESCRIPTION |
---|---|---|---|---|
7 | RESERVED | RW | 0 | Reserved |
6 | RESERVED | RW | 0 | Reserved |
5 | SER_BIST_ACT | R | 0 | Serializer BIST active This register indicates the Serializer is in BIST mode. When in BIST mode this flag can be checked to ensure BIST is activated in the serializer during the test. If the Deserializer is not in BIST mode, this could indicate an error condition. |
4:2 | RESERVED | RW | 0x0 | Reserved |
1 | FORCE _BC_ERRORS | RW | 0 | Setting this bit introduces continuous single bit errors into Back Channel Frames |
0 | FORCE _1_BC_ERROR | RW | 0 | Setting this bit introduces a single bit error into one Back Channel Frame |