JAJSMU1 February 2023 DS90UB638-Q1
PRODUCTION DATA
BIT | FIELD | TYPE | DEFAULT | DESCRIPTION |
---|---|---|---|---|
7:0 | PAR_ERROR _BYTE_0 | R/COR | 0 | Number of FPD-Link III parity errors 8 least significant bits. The parity error counter registers return the number of data parity errors that have been detected on the FPD-Link III Receiver data since the last detection of valid lock or last read of the RX_PAR_ERR_LO register. For accurate reading of the parity error count, disable the RX_PARITY_CHECKER_ENABLE bit in register 0x02 prior to reading the parity error count registers. This register is cleared on read. |