JAJSKM4A november 2020 – november 2020 DS90UB662-Q1
PRODUCTION DATA
| BIT | FIELD | TYPE | DEFAULT | DESCRIPTION |
|---|---|---|---|---|
| 7:4 | RESERVED | - | 0x0 | Reserved |
| 3 | SEL_OSC_200M | R/W | 0 | Select 200MHz Oscillator Clock The external reference clock is normally used to generate the digital and CSI-2 PLL reference clocks. This bit allows the use of the internal 200 MHz always-on oscillator clock instead. 0: Select external reference clock 1: Select internal always-on clock |
| 2 | REF_CLK_MODE | R/W | 0 | Reference Clock mode The digital logic requires a 200 MHz reference clock generated from the CSI-2 PLL. If this bit is set to 1, the reference clock will be 100 MHz. 0 : clock is 200 MHz 1 : clock is 100 MHz This bit should not be set to 1 if CSI_TX_SPEED is set for 400Mbps operation. |
| 1:0 | CSI_TX_SPEED | R/W | 10 | CSI-2 Transmitter Speed select: (See Section 7.4.19) Controls the CSI-2 Transmitter frequency. 00 : 1.472 - 1.6641.5 / 1.6 Gbps serial rate 01 : 1.2 Gbps serial rateReserved 10 : 800 Mbps serial rate 11 : 400 Mbps serial rate |